Move these helpers near their use by the trans_*
functions within insn_trans/trans_rvm.c.inc.
Signed-off-by: Richard Henderson
---
target/riscv/translate.c| 112
target/riscv/insn_trans/trans_rvm.c.inc | 112
2 files changed, 112 insertions(+), 112 deletions(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index e337dca01b..168274934d 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -248,118 +248,6 @@ static void gen_set_gpr(DisasContext *ctx, int reg_num,
TCGv t)
}
}
-static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2)
-{
-TCGv rl = tcg_temp_new();
-TCGv rh = tcg_temp_new();
-
-tcg_gen_mulu2_tl(rl, rh, arg1, arg2);
-/* fix up for one negative */
-tcg_gen_sari_tl(rl, arg1, TARGET_LONG_BITS - 1);
-tcg_gen_and_tl(rl, rl, arg2);
-tcg_gen_sub_tl(ret, rh, rl);
-
-tcg_temp_free(rl);
-tcg_temp_free(rh);
-}
-
-static void gen_div(TCGv ret, TCGv source1, TCGv source2)
-{
-TCGv temp1, temp2, zero, one, mone, min;
-
-/*
- * Handle by altering args to tcg_gen_div to produce req'd results:
- * For overflow: want source1 in temp1 and 1 in temp2
- * For div by zero: want -1 in temp1 and 1 in temp2 -> -1 result
- */
-temp1 = tcg_temp_new();
-temp2 = tcg_temp_new();
-zero = tcg_constant_tl(0);
-one = tcg_constant_tl(1);
-mone = tcg_constant_tl(-1);
-min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1));
-
-tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone);
-tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min);
-tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */
-tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, zero); /* temp2 = div0 */
-tcg_gen_or_tl(temp2, temp2, temp1); /* temp2 = overflow | div0 */
-
-/* if div by zero, set source1 to -1, otherwise don't change */
-tcg_gen_movcond_tl(TCG_COND_NE, temp1, source2, zero, source1, mone);
-
-/* if overflow or div by zero, set source2 to 1, else don't change */
-tcg_gen_movcond_tl(TCG_COND_EQ, temp2, temp2, zero, source2, one);
-
-tcg_gen_div_tl(ret, temp1, temp2);
-
-tcg_temp_free(temp1);
-tcg_temp_free(temp2);
-}
-
-static void gen_divu(TCGv ret, TCGv source1, TCGv source2)
-{
-TCGv temp1, temp2, zero, one, mone;
-
-temp1 = tcg_temp_new();
-temp2 = tcg_temp_new();
-zero = tcg_constant_tl(0);
-one = tcg_constant_tl(1);
-mone = tcg_constant_tl(-1);
-
-tcg_gen_movcond_tl(TCG_COND_NE, temp1, source2, zero, source1, mone);
-tcg_gen_movcond_tl(TCG_COND_NE, temp2, source2, zero, source2, one);
-tcg_gen_divu_tl(ret, temp1, temp2);
-
-tcg_temp_free(temp1);
-tcg_temp_free(temp2);
-}
-
-static void gen_rem(TCGv ret, TCGv source1, TCGv source2)
-{
-TCGv temp1, temp2, zero, one, mone, min;
-
-temp1 = tcg_temp_new();
-temp2 = tcg_temp_new();
-zero = tcg_constant_tl(0);
-one = tcg_constant_tl(1);
-mone = tcg_constant_tl(-1);
-min = tcg_constant_tl(1ull << (TARGET_LONG_BITS - 1));
-
-tcg_gen_setcond_tl(TCG_COND_EQ, temp2, source2, mone);
-tcg_gen_setcond_tl(TCG_COND_EQ, temp1, source1, min);
-tcg_gen_and_tl(temp1, temp1, temp2); /* temp1 = overflow */
-tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, source2, 0); /* temp2 = div0 */
-tcg_gen_or_tl(temp2, temp2, temp1); /* temp2 = overflow | div0 */
-
-/* if overflow or div by zero, set source2 to 1, else don't change */
-tcg_gen_movcond_tl(TCG_COND_EQ, temp2, temp2, zero, source2, one);
-tcg_gen_rem_tl(temp1, temp1, temp2);
-
-/* if div by zero, just return the original dividend */
-tcg_gen_movcond_tl(TCG_COND_NE, ret, source2, zero, temp1, source1);
-
-tcg_temp_free(temp1);
-tcg_temp_free(temp2);
-}
-
-static void gen_remu(TCGv ret, TCGv source1, TCGv source2)
-{
-TCGv temp2, zero, one;
-
-temp2 = tcg_temp_new();
-zero = tcg_constant_tl(0);
-one = tcg_constant_tl(1);
-
-tcg_gen_movcond_tl(TCG_COND_EQ, temp2, source2, zero, source2, one);
-tcg_gen_remu_tl(temp2, source1, temp2);
-
-/* if div by zero, just return the original dividend */
-tcg_gen_movcond_tl(TCG_COND_NE, ret, source2, zero, temp2, source1);
-
-tcg_temp_free(temp2);
-}
-
static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
{
target_ulong next_pc;
diff --git a/target/riscv/insn_trans/trans_rvm.c.inc
b/target/riscv/insn_trans/trans_rvm.c.inc
index 80552be7a3..ca665b96b1 100644
--- a/target/riscv/insn_trans/trans_rvm.c.inc
+++ b/target/riscv/insn_trans/trans_rvm.c.inc
@@ -39,6 +39,21 @@ static bool trans_mulh(DisasContext *ctx, arg_mulh *a)
return gen_arith(ctx, a, EXT_NONE, gen_mulh);
}
+static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2)
+{
+TCGv rl = tcg_temp_new();
+TCGv rh = tcg_temp_new();
+
+tcg_gen_mulu2_tl(rl, rh, arg1, arg2);
+/* fix up for one negative */
+tcg_gen_sari_tl(rl, arg1, TARGET_LONG_BITS - 1);
+
