Re: [PATCH v2 10/22] tcg/s390: Split out target constraints to tcg-target-con-str.h

[Peter Maydell]

On Fri, 15 Jan 2021 at 21:14, Richard Henderson
 wrote:
>
> Signed-off-by: Richard Henderson 
> ---
>  tcg/s390/tcg-target-con-str.h | 23 
>  tcg/s390/tcg-target.h |  1 +
>  tcg/s390/tcg-target.c.inc | 40 ---
>  3 files changed, 24 insertions(+), 40 deletions(-)
>  create mode 100644 tcg/s390/tcg-target-con-str.h
>
> diff --git a/tcg/s390/tcg-target-con-str.h b/tcg/s390/tcg-target-con-str.h
> new file mode 100644
> index 00..f905b357c3
> --- /dev/null
> +++ b/tcg/s390/tcg-target-con-str.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Define S390 target-specific operand constraints.
> + * Copyright (c) 2021 Linaro
> + */
> +
> +/*
> + * Define constraint letters for register sets:
> + * REGS(letter, register_mask)
> + */
> +REGS('r', 0x)
> +REGS('L', 0x & ~((1 << TCG_REG_R2) | (1 << TCG_REG_R3) | (1 << 
> TCG_REG_R4)))

I think this would be better using an ALL_GENERAL_REGS and
an ALL_QLDST_REGS the way you do for the other targets,
rather than hardcoding the 0x.

Otherwise
Reviewed-by: Peter Maydell 

thanks
-- PMM

[PATCH v2 10/22] tcg/s390: Split out target constraints to tcg-target-con-str.h

[Richard Henderson]

Signed-off-by: Richard Henderson 
---
 tcg/s390/tcg-target-con-str.h | 23 
 tcg/s390/tcg-target.h |  1 +
 tcg/s390/tcg-target.c.inc | 40 ---
 3 files changed, 24 insertions(+), 40 deletions(-)
 create mode 100644 tcg/s390/tcg-target-con-str.h

diff --git a/tcg/s390/tcg-target-con-str.h b/tcg/s390/tcg-target-con-str.h
new file mode 100644
index 00..f905b357c3
--- /dev/null
+++ b/tcg/s390/tcg-target-con-str.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Define S390 target-specific operand constraints.
+ * Copyright (c) 2021 Linaro
+ */
+
+/*
+ * Define constraint letters for register sets:
+ * REGS(letter, register_mask)
+ */
+REGS('r', 0x)
+REGS('L', 0x & ~((1 << TCG_REG_R2) | (1 << TCG_REG_R3) | (1 << 
TCG_REG_R4)))
+REGS('a', 1u << TCG_REG_R2)
+REGS('b', 1u << TCG_REG_R3)
+
+/*
+ * Define constraint letters for constants:
+ * CONST(letter, TCG_CT_CONST_* bit set)
+ */
+CONST('A', TCG_CT_CONST_S33)
+CONST('I', TCG_CT_CONST_S16)
+CONST('J', TCG_CT_CONST_S32)
+CONST('Z', TCG_CT_CONST_ZERO)
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index 641464eea4..c43d6aba84 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s390/tcg-target.h
@@ -159,5 +159,6 @@ static inline void tb_target_set_jmp_target(uintptr_t 
tc_ptr, uintptr_t jmp_rx,
 #define TCG_TARGET_NEED_LDST_LABELS
 #endif
 #define TCG_TARGET_NEED_POOL_LABELS
+#define TCG_TARGET_CON_STR_H
 
 #endif
diff --git a/tcg/s390/tcg-target.c.inc b/tcg/s390/tcg-target.c.inc
index 8517e55232..616bcfafc8 100644
--- a/tcg/s390/tcg-target.c.inc
+++ b/tcg/s390/tcg-target.c.inc
@@ -403,46 +403,6 @@ static bool patch_reloc(tcg_insn_unit *src_rw, int type,
 return false;
 }
 
-/* parse target specific constraints */
-static const char *target_parse_constraint(TCGArgConstraint *ct,
-   const char *ct_str, TCGType type)
-{
-switch (*ct_str++) {
-case 'r':  /* all registers */
-ct->regs = 0x;
-break;
-case 'L':  /* qemu_ld/st constraint */
-ct->regs = 0x;
-tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
-tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
-tcg_regset_reset_reg(ct->regs, TCG_REG_R4);
-break;
-case 'a':  /* force R2 for division */
-ct->regs = 0;
-tcg_regset_set_reg(ct->regs, TCG_REG_R2);
-break;
-case 'b':  /* force R3 for division */
-ct->regs = 0;
-tcg_regset_set_reg(ct->regs, TCG_REG_R3);
-break;
-case 'A':
-ct->ct |= TCG_CT_CONST_S33;
-break;
-case 'I':
-ct->ct |= TCG_CT_CONST_S16;
-break;
-case 'J':
-ct->ct |= TCG_CT_CONST_S32;
-break;
-case 'Z':
-ct->ct |= TCG_CT_CONST_ZERO;
-break;
-default:
-return NULL;
-}
-return ct_str;
-}
-
 /* Test if a constant matches the constraint. */
 static int tcg_target_const_match(tcg_target_long val, TCGType type,
   const TCGArgConstraint *arg_ct)
-- 
2.25.1