Re: [PATCH v2 3/5] hw/i386/apic: Simplify apic_get_class()

[Bernhard Beschow]

Am 3. Oktober 2023 08:27:26 UTC schrieb "Philippe Mathieu-Daudé" 
:
>Now than apic_get_class() can not fail, remove its

s/than/that/
s/can not/can't/ (which is stylistically consistent with "neither" below)

Best regards,
Bernhard

>Error** parameter. It can't return NULL neither, so
>simplify x86_cpu_apic_create().
>
>Signed-off-by: Philippe Mathieu-Daudé 
>---
> include/hw/i386/apic_internal.h | 2 +-
> hw/i386/amd_iommu.c | 2 +-
> hw/i386/intel_iommu.c   | 4 ++--
> target/i386/cpu-sysemu.c| 4 ++--
> 4 files changed, 6 insertions(+), 6 deletions(-)
>
>diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
>index 5f2ba24bfc..e61ad04769 100644
>--- a/include/hw/i386/apic_internal.h
>+++ b/include/hw/i386/apic_internal.h
>@@ -225,6 +225,6 @@ static inline int apic_get_bit(uint32_t *tab, int index)
> return !!(tab[i] & mask);
> }
> 
>-APICCommonClass *apic_get_class(Error **errp);
>+APICCommonClass *apic_get_class(void);
> 
> #endif /* QEMU_APIC_INTERNAL_H */
>diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
>index c98a3c6e11..0a95025ab7 100644
>--- a/hw/i386/amd_iommu.c
>+++ b/hw/i386/amd_iommu.c
>@@ -1368,7 +1368,7 @@ static MemTxResult amdvi_mem_ir_write(void *opaque, 
>hwaddr addr,
> return MEMTX_ERROR;
> }
> 
>-apic_get_class(NULL)->send_msi();
>+apic_get_class()->send_msi();
> 
> trace_amdvi_mem_ir_write(to.address, to.data);
> return MEMTX_OK;
>diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>index 2c832ab68b..dffe3583bd 100644
>--- a/hw/i386/intel_iommu.c
>+++ b/hw/i386/intel_iommu.c
>@@ -397,7 +397,7 @@ static void vtd_generate_interrupt(IntelIOMMUState *s, 
>hwaddr mesg_addr_reg,
> 
> trace_vtd_irq_generate(msi.address, msi.data);
> 
>-apic_get_class(NULL)->send_msi();
>+apic_get_class()->send_msi();
> }
> 
> /* Generate a fault event to software via MSI if conditions are met.
>@@ -3554,7 +3554,7 @@ static MemTxResult vtd_mem_ir_write(void *opaque, hwaddr 
>addr,
> return MEMTX_ERROR;
> }
> 
>-apic_get_class(NULL)->send_msi();
>+apic_get_class()->send_msi();
> 
> return MEMTX_OK;
> }
>diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c
>index 6a228c9178..9038c65267 100644
>--- a/target/i386/cpu-sysemu.c
>+++ b/target/i386/cpu-sysemu.c
>@@ -247,7 +247,7 @@ void x86_cpu_machine_reset_cb(void *opaque)
> cpu_reset(CPU(cpu));
> }
> 
>-APICCommonClass *apic_get_class(Error **errp)
>+APICCommonClass *apic_get_class(void)
> {
> const char *apic_type = "apic";
> 
>@@ -266,7 +266,7 @@ APICCommonClass *apic_get_class(Error **errp)
> void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
> {
> APICCommonState *apic;
>-APICCommonClass *apic_class = apic_get_class(errp);
>+APICCommonClass *apic_class = apic_get_class();
> 
> cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class)));
> object_property_add_child(OBJECT(cpu), "lapic",

Re: [PATCH v2 3/5] hw/i386/apic: Simplify apic_get_class()

[Peter Xu]

On Tue, Oct 03, 2023 at 10:27:26AM +0200, Philippe Mathieu-Daudé wrote:
> Now than apic_get_class() can not fail, remove its
> Error** parameter. It can't return NULL neither, so
> simplify x86_cpu_apic_create().
> 
> Signed-off-by: Philippe Mathieu-Daudé 

Reviewed-by: Peter Xu 

-- 
Peter Xu

[PATCH v2 3/5] hw/i386/apic: Simplify apic_get_class()

[Philippe Mathieu-Daudé]

Now than apic_get_class() can not fail, remove its
Error** parameter. It can't return NULL neither, so
simplify x86_cpu_apic_create().

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/apic_internal.h | 2 +-
 hw/i386/amd_iommu.c | 2 +-
 hw/i386/intel_iommu.c   | 4 ++--
 target/i386/cpu-sysemu.c| 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 5f2ba24bfc..e61ad04769 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -225,6 +225,6 @@ static inline int apic_get_bit(uint32_t *tab, int index)
 return !!(tab[i] & mask);
 }
 
-APICCommonClass *apic_get_class(Error **errp);
+APICCommonClass *apic_get_class(void);
 
 #endif /* QEMU_APIC_INTERNAL_H */
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index c98a3c6e11..0a95025ab7 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1368,7 +1368,7 @@ static MemTxResult amdvi_mem_ir_write(void *opaque, 
hwaddr addr,
 return MEMTX_ERROR;
 }
 
-apic_get_class(NULL)->send_msi();
+apic_get_class()->send_msi();
 
 trace_amdvi_mem_ir_write(to.address, to.data);
 return MEMTX_OK;
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 2c832ab68b..dffe3583bd 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -397,7 +397,7 @@ static void vtd_generate_interrupt(IntelIOMMUState *s, 
hwaddr mesg_addr_reg,
 
 trace_vtd_irq_generate(msi.address, msi.data);
 
-apic_get_class(NULL)->send_msi();
+apic_get_class()->send_msi();
 }
 
 /* Generate a fault event to software via MSI if conditions are met.
@@ -3554,7 +3554,7 @@ static MemTxResult vtd_mem_ir_write(void *opaque, hwaddr 
addr,
 return MEMTX_ERROR;
 }
 
-apic_get_class(NULL)->send_msi();
+apic_get_class()->send_msi();
 
 return MEMTX_OK;
 }
diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c
index 6a228c9178..9038c65267 100644
--- a/target/i386/cpu-sysemu.c
+++ b/target/i386/cpu-sysemu.c
@@ -247,7 +247,7 @@ void x86_cpu_machine_reset_cb(void *opaque)
 cpu_reset(CPU(cpu));
 }
 
-APICCommonClass *apic_get_class(Error **errp)
+APICCommonClass *apic_get_class(void)
 {
 const char *apic_type = "apic";
 
@@ -266,7 +266,7 @@ APICCommonClass *apic_get_class(Error **errp)
 void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
 {
 APICCommonState *apic;
-APICCommonClass *apic_class = apic_get_class(errp);
+APICCommonClass *apic_class = apic_get_class();
 
 cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class)));
 object_property_add_child(OBJECT(cpu), "lapic",
-- 
2.41.0