Renaming defines for quad in their various forms so that their signedness is
now explicit.
Done using git grep as suggested by Philippe, with a bit of hand edition to
keep assignments aligned.
Signed-off-by: Frédéric Pétrot
Reviewed-by: Philippe Mathieu-Daudé
---
include/exec/memop.h | 8 +--
include/tcg/tcg-op.h | 4 +-
target/arm/translate-a32.h | 4 +-
accel/tcg/cputlb.c | 30 +--
accel/tcg/user-exec.c | 8 +--
target/alpha/translate.c | 32 ++--
target/arm/helper-a64.c| 8 +--
target/arm/translate-a64.c | 8 +--
target/arm/translate-neon.c| 6 +--
target/arm/translate-sve.c | 10 ++--
target/arm/translate-vfp.c | 8 +--
target/arm/translate.c | 2 +-
target/cris/translate.c| 2 +-
target/hppa/translate.c| 4 +-
target/i386/tcg/mem_helper.c | 2 +-
target/i386/tcg/translate.c| 36 +++---
target/m68k/op_helper.c| 2 +-
target/mips/tcg/translate.c| 58 +++---
target/mips/tcg/tx79_translate.c | 8 +--
target/ppc/translate.c | 32 ++--
target/s390x/tcg/mem_helper.c | 8 +--
target/s390x/tcg/translate.c | 8 +--
target/sh4/translate.c | 12 ++---
target/sparc/translate.c | 36 +++---
target/tricore/translate.c | 4 +-
target/xtensa/translate.c | 4 +-
tcg/tcg.c | 4 +-
tcg/tci.c | 16 +++---
accel/tcg/ldst_common.c.inc| 8 +--
target/mips/tcg/micromips_translate.c.inc | 10 ++--
target/ppc/translate/fixedpoint-impl.c.inc | 22
target/ppc/translate/fp-impl.c.inc | 4 +-
target/ppc/translate/vsx-impl.c.inc| 42
target/riscv/insn_trans/trans_rva.c.inc| 22
target/riscv/insn_trans/trans_rvd.c.inc| 4 +-
target/riscv/insn_trans/trans_rvh.c.inc| 4 +-
target/riscv/insn_trans/trans_rvi.c.inc| 4 +-
target/s390x/tcg/translate_vx.c.inc| 18 +++
tcg/aarch64/tcg-target.c.inc | 2 +-
tcg/arm/tcg-target.c.inc | 10 ++--
tcg/i386/tcg-target.c.inc | 12 ++---
tcg/mips/tcg-target.c.inc | 12 ++---
tcg/ppc/tcg-target.c.inc | 16 +++---
tcg/riscv/tcg-target.c.inc | 6 +--
tcg/s390x/tcg-target.c.inc | 18 +++
tcg/sparc/tcg-target.c.inc | 16 +++---
target/s390x/tcg/insn-data.def | 28 +--
47 files changed, 311 insertions(+), 311 deletions(-)
diff --git a/include/exec/memop.h b/include/exec/memop.h
index 04264ffd6b..72c2f0ff3d 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -85,29 +85,29 @@ typedef enum MemOp {
MO_UB= MO_8,
MO_UW= MO_16,
MO_UL= MO_32,
+MO_UQ= MO_64,
MO_SB= MO_SIGN | MO_8,
MO_SW= MO_SIGN | MO_16,
MO_SL= MO_SIGN | MO_32,
-MO_Q = MO_64,
MO_LEUW = MO_LE | MO_UW,
MO_LEUL = MO_LE | MO_UL,
+MO_LEUQ = MO_LE | MO_UQ,
MO_LESW = MO_LE | MO_SW,
MO_LESL = MO_LE | MO_SL,
-MO_LEQ = MO_LE | MO_Q,
MO_BEUW = MO_BE | MO_UW,
MO_BEUL = MO_BE | MO_UL,
+MO_BEUQ = MO_BE | MO_UQ,
MO_BESW = MO_BE | MO_SW,
MO_BESL = MO_BE | MO_SL,
-MO_BEQ = MO_BE | MO_Q,
#ifdef NEED_CPU_H
MO_TEUW = MO_TE | MO_UW,
MO_TEUL = MO_TE | MO_UL,
+MO_TEUQ = MO_TE | MO_UQ,
MO_TESW = MO_TE | MO_SW,
MO_TESL = MO_TE | MO_SL,
-MO_TEQ = MO_TE | MO_Q,
#endif
MO_SSIZE = MO_SIZE | MO_SIGN,
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 0545a6224c..caa0a63612 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -894,7 +894,7 @@ static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr,
int mem_index)
static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
{
-tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
+tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEUQ);
}
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
@@ -914,7 +914,7 @@ static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr,
int mem_index)
static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
{
-tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
+tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEUQ);
}
void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h
index 17af8dc95a..5be4b9b834 100644
--- a/target/arm/translate-a32.h
+++ b/target/arm/translate-a32.h
