Re: [PATCH v5 12/14] target/hexagon: remove unused macros and functions
Don't do this. Keeping these around makes it easy to fall back to the
helper implementations for debugging. Also, some of them are needed for
future HVX support.
Thanks,
Taylor
On Sat, Jun 19, 2021 at 4:48 AM Alessandro Di Federico via <
qemu-devel@nongnu.org> wrote:
> From: Paolo Montesel
>
> Signed-off-by: Alessandro Di Federico
> Signed-off-by: Paolo Montesel
> ---
> target/hexagon/gen_tcg.h | 528 -
> target/hexagon/genptr.c| 98 ---
> target/hexagon/macros.h| 200 +-
> target/hexagon/op_helper.c | 119 -
> 4 files changed, 9 insertions(+), 936 deletions(-)
>
> diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
> index 18fcdbc7e4..f1dd1b64c1 100644
> --- a/target/hexagon/gen_tcg.h
> +++ b/target/hexagon/gen_tcg.h
> @@ -43,381 +43,6 @@
> * _pcr post increment circular register r0 =
> memw(r1++I:circ(m0))
> */
>
> -/* Macros for complex addressing modes */
> -#define GET_EA_ap \
> -do { \
> -fEA_IMM(UiV); \
> -tcg_gen_movi_tl(ReV, UiV); \
> -} while (0)
> -#define GET_EA_pr \
> -do { \
> -fEA_REG(RxV); \
> -fPM_M(RxV, MuV); \
> -} while (0)
> -#define GET_EA_pbr \
> -do { \
> -gen_helper_fbrev(EA, RxV); \
> -tcg_gen_add_tl(RxV, RxV, MuV); \
> -} while (0)
> -#define GET_EA_pi \
> -do { \
> -fEA_REG(RxV); \
> -fPM_I(RxV, siV); \
> -} while (0)
> -#define GET_EA_pci \
> -do { \
> -TCGv tcgv_siV = tcg_const_tl(siV); \
> -tcg_gen_mov_tl(EA, RxV); \
> -gen_helper_fcircadd(RxV, RxV, tcgv_siV, MuV, \
> -hex_gpr[HEX_REG_CS0 + MuN]); \
> -tcg_temp_free(tcgv_siV); \
> -} while (0)
> -#define GET_EA_pcr(SHIFT) \
> -do { \
> -TCGv ireg = tcg_temp_new(); \
> -tcg_gen_mov_tl(EA, RxV); \
> -gen_read_ireg(ireg, MuV, (SHIFT)); \
> -gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 +
> MuN]); \
> -tcg_temp_free(ireg); \
> -} while (0)
> -
> -/* Instructions with multiple definitions */
> -#define fGEN_TCG_LOAD_AP(RES, SIZE, SIGN) \
> -do { \
> -fMUST_IMMEXT(UiV); \
> -fEA_IMM(UiV); \
> -fLOAD(1, SIZE, SIGN, EA, RES); \
> -tcg_gen_movi_tl(ReV, UiV); \
> -} while (0)
> -
> -#define fGEN_TCG_L4_loadrub_ap(SHORTCODE) \
> -fGEN_TCG_LOAD_AP(RdV, 1, u)
> -#define fGEN_TCG_L4_loadrb_ap(SHORTCODE) \
> -fGEN_TCG_LOAD_AP(RdV, 1, s)
> -#define fGEN_TCG_L4_loadruh_ap(SHORTCODE) \
> -fGEN_TCG_LOAD_AP(RdV, 2, u)
> -#define fGEN_TCG_L4_loadrh_ap(SHORTCODE) \
> -fGEN_TCG_LOAD_AP(RdV, 2, s)
> -#define fGEN_TCG_L4_loadri_ap(SHORTCODE) \
> -fGEN_TCG_LOAD_AP(RdV, 4, u)
> -#define fGEN_TCG_L4_loadrd_ap(SHORTCODE) \
> -fGEN_TCG_LOAD_AP(RddV, 8, u)
> -
> -#define fGEN_TCG_L2_loadrub_pci(SHORTCODE)SHORTCODE
> -#define fGEN_TCG_L2_loadrb_pci(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadruh_pci(SHORTCODE)SHORTCODE
> -#define fGEN_TCG_L2_loadrh_pci(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadri_pci(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrd_pci(SHORTCODE) SHORTCODE
> -
> -#define fGEN_TCG_LOAD_pcr(SHIFT, LOAD) \
> -do { \
> -TCGv ireg = tcg_temp_new(); \
> -tcg_gen_mov_tl(EA, RxV); \
> -gen_read_ireg(ireg, MuV, SHIFT); \
> -gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 +
> MuN]); \
> -LOAD; \
> -tcg_temp_free(ireg); \
> -} while (0)
> -
> -#define fGEN_TCG_L2_loadrub_pcr(SHORTCODE) \
> - fGEN_TCG_LOAD_pcr(0, fLOAD(1, 1, u, EA, RdV))
> -#define fGEN_TCG_L2_loadrb_pcr(SHORTCODE) \
> - fGEN_TCG_LOAD_pcr(0, fLOAD(1, 1, s, EA, RdV))
> -#define fGEN_TCG_L2_loadruh_pcr(SHORTCODE) \
> - fGEN_TCG_LOAD_pcr(1, fLOAD(1, 2, u, EA, RdV))
> -#define fGEN_TCG_L2_loadrh_pcr(SHORTCODE) \
> - fGEN_TCG_LOAD_pcr(1, fLOAD(1, 2, s, EA, RdV))
> -#define fGEN_TCG_L2_loadri_pcr(SHORTCODE) \
> - fGEN_TCG_LOAD_pcr(2, fLOAD(1, 4, u, EA, RdV))
> -#define fGEN_TCG_L2_loadrd_pcr(SHORTCODE) \
> - fGEN_TCG_LOAD_pcr(3, fLOAD(1, 8, u, EA, RddV))
> -
> -#define fGEN_TCG_L2_loadrub_pr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrub_pbr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrub_pi(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrb_pr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrb_pbr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrb_pi(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadruh_pr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadruh_pbr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadruh_pi(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrh_pr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrh_pbr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadrh_pi(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadri_pr(SHORTCODE) SHORTCODE
> -#define fGEN_TCG_L2_loadri_pbr(SHORTCODE)
[PATCH v5 12/14] target/hexagon: remove unused macros and functions
From: Paolo Montesel
Signed-off-by: Alessandro Di Federico
Signed-off-by: Paolo Montesel
---
target/hexagon/gen_tcg.h | 528 -
target/hexagon/genptr.c| 98 ---
target/hexagon/macros.h| 200 +-
target/hexagon/op_helper.c | 119 -
4 files changed, 9 insertions(+), 936 deletions(-)
diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index 18fcdbc7e4..f1dd1b64c1 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -43,381 +43,6 @@
* _pcr post increment circular register r0 = memw(r1++I:circ(m0))
*/
-/* Macros for complex addressing modes */
-#define GET_EA_ap \
-do { \
-fEA_IMM(UiV); \
-tcg_gen_movi_tl(ReV, UiV); \
-} while (0)
-#define GET_EA_pr \
-do { \
-fEA_REG(RxV); \
-fPM_M(RxV, MuV); \
-} while (0)
-#define GET_EA_pbr \
-do { \
-gen_helper_fbrev(EA, RxV); \
-tcg_gen_add_tl(RxV, RxV, MuV); \
-} while (0)
-#define GET_EA_pi \
-do { \
-fEA_REG(RxV); \
-fPM_I(RxV, siV); \
-} while (0)
-#define GET_EA_pci \
-do { \
-TCGv tcgv_siV = tcg_const_tl(siV); \
-tcg_gen_mov_tl(EA, RxV); \
-gen_helper_fcircadd(RxV, RxV, tcgv_siV, MuV, \
-hex_gpr[HEX_REG_CS0 + MuN]); \
-tcg_temp_free(tcgv_siV); \
-} while (0)
-#define GET_EA_pcr(SHIFT) \
-do { \
-TCGv ireg = tcg_temp_new(); \
-tcg_gen_mov_tl(EA, RxV); \
-gen_read_ireg(ireg, MuV, (SHIFT)); \
-gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 + MuN]); \
-tcg_temp_free(ireg); \
-} while (0)
-
-/* Instructions with multiple definitions */
-#define fGEN_TCG_LOAD_AP(RES, SIZE, SIGN) \
-do { \
-fMUST_IMMEXT(UiV); \
-fEA_IMM(UiV); \
-fLOAD(1, SIZE, SIGN, EA, RES); \
-tcg_gen_movi_tl(ReV, UiV); \
-} while (0)
-
-#define fGEN_TCG_L4_loadrub_ap(SHORTCODE) \
-fGEN_TCG_LOAD_AP(RdV, 1, u)
-#define fGEN_TCG_L4_loadrb_ap(SHORTCODE) \
-fGEN_TCG_LOAD_AP(RdV, 1, s)
-#define fGEN_TCG_L4_loadruh_ap(SHORTCODE) \
-fGEN_TCG_LOAD_AP(RdV, 2, u)
-#define fGEN_TCG_L4_loadrh_ap(SHORTCODE) \
-fGEN_TCG_LOAD_AP(RdV, 2, s)
-#define fGEN_TCG_L4_loadri_ap(SHORTCODE) \
-fGEN_TCG_LOAD_AP(RdV, 4, u)
-#define fGEN_TCG_L4_loadrd_ap(SHORTCODE) \
-fGEN_TCG_LOAD_AP(RddV, 8, u)
-
-#define fGEN_TCG_L2_loadrub_pci(SHORTCODE)SHORTCODE
-#define fGEN_TCG_L2_loadrb_pci(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadruh_pci(SHORTCODE)SHORTCODE
-#define fGEN_TCG_L2_loadrh_pci(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadri_pci(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrd_pci(SHORTCODE) SHORTCODE
-
-#define fGEN_TCG_LOAD_pcr(SHIFT, LOAD) \
-do { \
-TCGv ireg = tcg_temp_new(); \
-tcg_gen_mov_tl(EA, RxV); \
-gen_read_ireg(ireg, MuV, SHIFT); \
-gen_helper_fcircadd(RxV, RxV, ireg, MuV, hex_gpr[HEX_REG_CS0 + MuN]); \
-LOAD; \
-tcg_temp_free(ireg); \
-} while (0)
-
-#define fGEN_TCG_L2_loadrub_pcr(SHORTCODE) \
- fGEN_TCG_LOAD_pcr(0, fLOAD(1, 1, u, EA, RdV))
-#define fGEN_TCG_L2_loadrb_pcr(SHORTCODE) \
- fGEN_TCG_LOAD_pcr(0, fLOAD(1, 1, s, EA, RdV))
-#define fGEN_TCG_L2_loadruh_pcr(SHORTCODE) \
- fGEN_TCG_LOAD_pcr(1, fLOAD(1, 2, u, EA, RdV))
-#define fGEN_TCG_L2_loadrh_pcr(SHORTCODE) \
- fGEN_TCG_LOAD_pcr(1, fLOAD(1, 2, s, EA, RdV))
-#define fGEN_TCG_L2_loadri_pcr(SHORTCODE) \
- fGEN_TCG_LOAD_pcr(2, fLOAD(1, 4, u, EA, RdV))
-#define fGEN_TCG_L2_loadrd_pcr(SHORTCODE) \
- fGEN_TCG_LOAD_pcr(3, fLOAD(1, 8, u, EA, RddV))
-
-#define fGEN_TCG_L2_loadrub_pr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrub_pbr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrub_pi(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrb_pr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrb_pbr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrb_pi(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadruh_pr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadruh_pbr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadruh_pi(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrh_pr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrh_pbr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrh_pi(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadri_pr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadri_pbr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadri_pi(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrd_pr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrd_pbr(SHORTCODE) SHORTCODE
-#define fGEN_TCG_L2_loadrd_pi(SHORTCODE) SHORTCODE
-
-/*
- * These instructions load 2 bytes and places them in
- * two halves of the destination register.
- * The GET_EA macro determines the addressing mode.
- * The SIGN argument determines whether to zero-extend or
- * sign-extend.
- */
-#define fGEN_TCG_loadbXw2(GET_EA, S
