Re: [PULL 00/24] tcg patch queue

2024-06-19 Thread Richard Henderson

On 6/19/24 13:59, Richard Henderson wrote:

The following changes since commit 223696363bb117241ad9c2facbff0c474afa4104:

   Merge tag 'edgar/xilinx-queue-2024-06-17.for-upstream' 
ofhttps://gitlab.com/edgar.iglesias/qemu  into staging (2024-06-18 13:08:01 
-0700)

are available in the Git repository at:

   https://gitlab.com/rth7680/qemu.git  tags/pull-tcg-20240619

for you to fetch changes up to 521d7fb3ebdf88112ed13556a93e3037742b9eb8:

   tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers (2024-06-19 
13:50:22 -0700)


tcg/loongarch64: Support 64- and 256-bit vectors
tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers
util/bufferiszero: Split out host include files
util/bufferiszero: Add loongarch64 vector acceleration
accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
target/sparc: use signed denominator in sdiv helper
linux-user: Make TARGET_NR_setgroups affect only the current thread


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/9.1 as 
appropriate.


r~




[PULL 00/24] tcg patch queue

2024-06-19 Thread Richard Henderson
The following changes since commit 223696363bb117241ad9c2facbff0c474afa4104:

  Merge tag 'edgar/xilinx-queue-2024-06-17.for-upstream' of 
https://gitlab.com/edgar.iglesias/qemu into staging (2024-06-18 13:08:01 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240619

for you to fetch changes up to 521d7fb3ebdf88112ed13556a93e3037742b9eb8:

  tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers (2024-06-19 13:50:22 
-0700)


tcg/loongarch64: Support 64- and 256-bit vectors
tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers
util/bufferiszero: Split out host include files
util/bufferiszero: Add loongarch64 vector acceleration
accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
target/sparc: use signed denominator in sdiv helper
linux-user: Make TARGET_NR_setgroups affect only the current thread


Anton Johansson (1):
  accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded

Clément Chigot (1):
  target/sparc: use signed denominator in sdiv helper

Ilya Leoshkevich (1):
  linux-user: Make TARGET_NR_setgroups affect only the current thread

Richard Henderson (21):
  tcg/loongarch64: Import LASX, FP insns
  tcg/loongarch64: Use fp load/store for I32 and I64 into vector regs
  tcg/loongarch64: Handle i32 and i64 moves between gr and fr
  tcg/loongarch64: Support TCG_TYPE_V64
  util/loongarch64: Detect LASX vector support
  tcg/loongarch64: Simplify tcg_out_dup_vec
  tcg/loongarch64: Support LASX in tcg_out_dup_vec
  tcg/loongarch64: Support LASX in tcg_out_dupm_vec
  tcg/loongarch64: Use tcg_out_dup_vec in tcg_out_dupi_vec
  tcg/loongarch64: Support LASX in tcg_out_dupi_vec
  tcg/loongarch64: Simplify tcg_out_addsub_vec
  tcg/loongarch64: Support LASX in tcg_out_addsub_vec
  tcg/loongarch64: Split out vdvjvk in tcg_out_vec_op
  tcg/loongarch64: Support LASX in tcg_out_{mov,ld,st}
  tcg/loongarch64: Remove temp_vec from tcg_out_vec_op
  tcg/loongarch64: Split out vdvjukN in tcg_out_vec_op
  tcg/loongarch64: Support LASX in tcg_out_vec_op
  tcg/loongarch64: Enable v256 with LASX
  util/bufferiszero: Split out host include files
  util/bufferiszero: Add loongarch64 vector acceleration
  tcg/loongarch64: Fix tcg_out_movi vs some pcrel pointers

 host/include/loongarch64/host/cpuinfo.h  |1 +
 tcg/loongarch64/tcg-target.h |4 +-
 accel/tcg/tb-maint.c |4 +-
 linux-user/syscall.c |   10 +-
 target/sparc/helper.c|2 +-
 util/bufferiszero.c  |  191 +-
 util/cpuinfo-loongarch.c |1 +
 host/include/aarch64/host/bufferiszero.c.inc |   76 +
 host/include/generic/host/bufferiszero.c.inc |   10 +
 host/include/i386/host/bufferiszero.c.inc|  124 +
 host/include/loongarch64/host/bufferiszero.c.inc |  143 +
 host/include/x86_64/host/bufferiszero.c.inc  |1 +
 tcg/loongarch64/tcg-insn-defs.c.inc  | 6181 --
 tcg/loongarch64/tcg-target.c.inc |  601 ++-
 14 files changed, 2838 insertions(+), 4511 deletions(-)
 create mode 100644 host/include/aarch64/host/bufferiszero.c.inc
 create mode 100644 host/include/generic/host/bufferiszero.c.inc
 create mode 100644 host/include/i386/host/bufferiszero.c.inc
 create mode 100644 host/include/loongarch64/host/bufferiszero.c.inc
 create mode 100644 host/include/x86_64/host/bufferiszero.c.inc



Re: [PULL 00/24] tcg patch queue

2021-10-16 Thread Richard Henderson

On 10/16/21 11:14 AM, Richard Henderson wrote:

The following changes since commit 6587b0c1331d427b0939c37e763842550ed581db:

   Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-10-15' into 
staging (2021-10-15 14:16:28 -0700)

are available in the Git repository at:

   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211016

for you to fetch changes up to 995b87dedc78b0467f5f18bbc3546072ba97516a:

   Revert "cpu: Move cpu_common_props to hw/core/cpu.c" (2021-10-15 16:39:15 
-0700)


Move gdb singlestep to generic code
Fix cpu_common_props


Richard Henderson (24):
   accel/tcg: Handle gdb singlestep in cpu_tb_exec
   target/alpha: Drop checks for singlestep_enabled
   target/avr: Drop checks for singlestep_enabled
   target/cris: Drop checks for singlestep_enabled
   target/hexagon: Drop checks for singlestep_enabled
   target/arm: Drop checks for singlestep_enabled
   target/hppa: Drop checks for singlestep_enabled
   target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt
   target/i386: Drop check for singlestep_enabled
   target/m68k: Drop checks for singlestep_enabled
   target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMP
   target/microblaze: Drop checks for singlestep_enabled
   target/mips: Fix single stepping
   target/mips: Drop exit checks for singlestep_enabled
   target/openrisc: Drop checks for singlestep_enabled
   target/ppc: Drop exit checks for singlestep_enabled
   target/riscv: Remove dead code after exception
   target/riscv: Remove exit_tb and lookup_and_goto_ptr
   target/rx: Drop checks for singlestep_enabled
   target/s390x: Drop check for singlestep_enabled
   target/sh4: Drop check for singlestep_enabled
   target/tricore: Drop check for singlestep_enabled
   target/xtensa: Drop check for singlestep_enabled
   Revert "cpu: Move cpu_common_props to hw/core/cpu.c"

  include/hw/core/cpu.h  |  1 +
  target/i386/helper.h   |  1 -
  target/rx/helper.h |  1 -
  target/sh4/helper.h|  1 -
  target/tricore/helper.h|  1 -
  accel/tcg/cpu-exec.c   | 11 
  cpu.c  | 21 
  hw/core/cpu-common.c   | 17 +-
  target/alpha/translate.c   | 13 ++---
  target/arm/translate-a64.c | 10 +---
  target/arm/translate.c | 36 +++--
  target/avr/translate.c | 19 ++-
  target/cris/translate.c| 16 --
  target/hexagon/translate.c | 12 +
  target/hppa/translate.c| 17 ++
  target/i386/tcg/misc_helper.c  |  8 ---
  target/i386/tcg/translate.c|  9 ++--
  target/m68k/translate.c| 44 ---
  target/microblaze/translate.c  | 18 ++-
  target/mips/tcg/translate.c| 75 --
  target/openrisc/translate.c| 18 ++-
  target/ppc/translate.c | 38 +++--
  target/riscv/translate.c   | 27 +-
  target/rx/op_helper.c  |  8 ---
  target/rx/translate.c  | 12 +
  target/s390x/tcg/translate.c   |  8 +--
  target/sh4/op_helper.c |  5 --
  target/sh4/translate.c | 14 ++---
  target/tricore/op_helper.c |  7 ---
  target/tricore/translate.c | 14 +
  target/xtensa/translate.c  | 25 +++--
  target/riscv/insn_trans/trans_privileged.c.inc | 10 ++--
  target/riscv/insn_trans/trans_rvi.c.inc|  8 ++-
  target/riscv/insn_trans/trans_rvv.c.inc|  2 +-
  34 files changed, 141 insertions(+), 386 deletions(-)


Applied, thanks.

r~




[PULL 00/24] tcg patch queue

2021-10-16 Thread Richard Henderson
The following changes since commit 6587b0c1331d427b0939c37e763842550ed581db:

  Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-10-15' into 
staging (2021-10-15 14:16:28 -0700)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211016

for you to fetch changes up to 995b87dedc78b0467f5f18bbc3546072ba97516a:

  Revert "cpu: Move cpu_common_props to hw/core/cpu.c" (2021-10-15 16:39:15 
-0700)


Move gdb singlestep to generic code
Fix cpu_common_props


Richard Henderson (24):
  accel/tcg: Handle gdb singlestep in cpu_tb_exec
  target/alpha: Drop checks for singlestep_enabled
  target/avr: Drop checks for singlestep_enabled
  target/cris: Drop checks for singlestep_enabled
  target/hexagon: Drop checks for singlestep_enabled
  target/arm: Drop checks for singlestep_enabled
  target/hppa: Drop checks for singlestep_enabled
  target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt
  target/i386: Drop check for singlestep_enabled
  target/m68k: Drop checks for singlestep_enabled
  target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMP
  target/microblaze: Drop checks for singlestep_enabled
  target/mips: Fix single stepping
  target/mips: Drop exit checks for singlestep_enabled
  target/openrisc: Drop checks for singlestep_enabled
  target/ppc: Drop exit checks for singlestep_enabled
  target/riscv: Remove dead code after exception
  target/riscv: Remove exit_tb and lookup_and_goto_ptr
  target/rx: Drop checks for singlestep_enabled
  target/s390x: Drop check for singlestep_enabled
  target/sh4: Drop check for singlestep_enabled
  target/tricore: Drop check for singlestep_enabled
  target/xtensa: Drop check for singlestep_enabled
  Revert "cpu: Move cpu_common_props to hw/core/cpu.c"

 include/hw/core/cpu.h  |  1 +
 target/i386/helper.h   |  1 -
 target/rx/helper.h |  1 -
 target/sh4/helper.h|  1 -
 target/tricore/helper.h|  1 -
 accel/tcg/cpu-exec.c   | 11 
 cpu.c  | 21 
 hw/core/cpu-common.c   | 17 +-
 target/alpha/translate.c   | 13 ++---
 target/arm/translate-a64.c | 10 +---
 target/arm/translate.c | 36 +++--
 target/avr/translate.c | 19 ++-
 target/cris/translate.c| 16 --
 target/hexagon/translate.c | 12 +
 target/hppa/translate.c| 17 ++
 target/i386/tcg/misc_helper.c  |  8 ---
 target/i386/tcg/translate.c|  9 ++--
 target/m68k/translate.c| 44 ---
 target/microblaze/translate.c  | 18 ++-
 target/mips/tcg/translate.c| 75 --
 target/openrisc/translate.c| 18 ++-
 target/ppc/translate.c | 38 +++--
 target/riscv/translate.c   | 27 +-
 target/rx/op_helper.c  |  8 ---
 target/rx/translate.c  | 12 +
 target/s390x/tcg/translate.c   |  8 +--
 target/sh4/op_helper.c |  5 --
 target/sh4/translate.c | 14 ++---
 target/tricore/op_helper.c |  7 ---
 target/tricore/translate.c | 14 +
 target/xtensa/translate.c  | 25 +++--
 target/riscv/insn_trans/trans_privileged.c.inc | 10 ++--
 target/riscv/insn_trans/trans_rvi.c.inc|  8 ++-
 target/riscv/insn_trans/trans_rvv.c.inc|  2 +-
 34 files changed, 141 insertions(+), 386 deletions(-)



Re: [PULL 00/24] tcg patch queue

2021-02-04 Thread Peter Maydell
On Wed, 3 Feb 2021 at 02:15, Richard Henderson
 wrote:
>
> The following changes since commit 77f3804ab7ed94b471a14acb260e5aeacf26193f:
>
>   Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging 
> (2021-02-02 16:47:51 +)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210202
>
> for you to fetch changes up to 0c823e596877a30fd6c17a1ae9f98218a53055ea:
>
>   tcg: Remove TCG_TARGET_CON_SET_H (2021-02-02 12:12:43 -1000)
>
> 
> TCG backend constraints cleanup
>
> 


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.

-- PMM



Re: [PULL 00/24] tcg patch queue

2021-02-02 Thread no-reply
Patchew URL: 
https://patchew.org/QEMU/20210203021550.375058-1-richard.hender...@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210203021550.375058-1-richard.hender...@linaro.org
Subject: [PULL 00/24] tcg patch queue

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]  patchew/20210201080348.438095-1-f4...@amsat.org -> 
patchew/20210201080348.438095-1-f4...@amsat.org
 * [new tag] 
patchew/20210203021550.375058-1-richard.hender...@linaro.org -> 
patchew/20210203021550.375058-1-richard.hender...@linaro.org
Switched to a new branch 'test'
7f7ed81 tcg: Remove TCG_TARGET_CON_SET_H
bb97c8f tcg/tci: Split out constraint sets to tcg-target-con-set.h
902c769 tcg/sparc: Split out constraint sets to tcg-target-con-set.h
b8c72bc tcg/s390: Split out constraint sets to tcg-target-con-set.h
9ee5700 tcg/riscv: Split out constraint sets to tcg-target-con-set.h
1740539 tcg/ppc: Split out constraint sets to tcg-target-con-set.h
ab51584 tcg/mips: Split out constraint sets to tcg-target-con-set.h
1d7748d tcg/arm: Split out constraint sets to tcg-target-con-set.h
6341650 tcg/aarch64: Split out constraint sets to tcg-target-con-set.h
169b93c tcg/i386: Split out constraint sets to tcg-target-con-set.h
6151c6c tcg: Remove TCG_TARGET_CON_STR_H
5378f1b tcg/sparc: Split out target constraints to tcg-target-con-str.h
0ac8068 tcg/s390: Split out target constraints to tcg-target-con-str.h
a225412 tcg/riscv: Split out target constraints to tcg-target-con-str.h
80edabe tcg/mips: Split out target constraints to tcg-target-con-str.h
0c5de83 tcg/tci: Split out target constraints to tcg-target-con-str.h
ff92f04 tcg/ppc: Split out target constraints to tcg-target-con-str.h
a625743 tcg/aarch64: Split out target constraints to tcg-target-con-str.h
ca53a0a tcg/arm: Split out target constraints to tcg-target-con-str.h
1163432 tcg/i386: Split out target constraints to tcg-target-con-str.h
5b0a72d tcg/i386: Tidy register constraint definitions
d4aa12b tcg/i386: Move constraint type check to tcg_target_const_match
1335fa6 tcg/tci: Remove TCG_TARGET_HAS_* ifdefs
17e08f6 tcg/tci: Drop L and S constraints

=== OUTPUT BEGIN ===
1/24 Checking commit 17e08f6cd41e (tcg/tci: Drop L and S constraints)
2/24 Checking commit 1335fa6eef88 (tcg/tci: Remove TCG_TARGET_HAS_* ifdefs)
3/24 Checking commit d4aa12bb1bca (tcg/i386: Move constraint type check to 
tcg_target_const_match)
4/24 Checking commit 5b0a72d242f6 (tcg/i386: Tidy register constraint 
definitions)
5/24 Checking commit 1163432e5dee (tcg/i386: Split out target constraints to 
tcg-target-con-str.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#23: 
new file mode 100644

ERROR: Macros with multiple statements should be enclosed in a do - while loop
#192: FILE: tcg/tcg.c:2471:
+#define CONST(CASE, MASK) \
+case CASE: def->args_ct[i].ct |= MASK; ct_str++; break;

ERROR: trailing statements should be on next line
#193: FILE: tcg/tcg.c:2472:
+case CASE: def->args_ct[i].ct |= MASK; ct_str++; break;

ERROR: Macros with multiple statements should be enclosed in a do - while loop
#194: FILE: tcg/tcg.c:2473:
+#define REGS(CASE, MASK) \
+case CASE: def->args_ct[i].regs |= MASK; ct_str++; break;

ERROR: trailing statements should be on next line
#195: FILE: tcg/tcg.c:2474:
+case CASE: def->args_ct[i].regs |= MASK; ct_str++; break;

total: 4 errors, 1 warnings, 175 lines checked

Patch 5/24 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/24 Checking commit ca53a0a97914 (tcg/arm: Split out target constraints to 
tcg-target-con-str.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
new file mode 100644

total: 0 errors, 1 warnings, 111 lines checked

Patch 6/24 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/24 Checking commit a62574360c28 (tcg/aarch64: Split out target constraints to 
tcg-target-con-str.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
new file mode 100644

total: 0 errors, 1 warnings, 89 lines checked

Patch 7/24 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
8/24 Checking commit ff92f04f845a (tcg/ppc: Split out target constraints to 
tcg-target-con-str.h)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
new file mode 100644

total: 0 er

[PULL 00/24] tcg patch queue

2021-02-02 Thread Richard Henderson
The following changes since commit 77f3804ab7ed94b471a14acb260e5aeacf26193f:

  Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging 
(2021-02-02 16:47:51 +)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210202

for you to fetch changes up to 0c823e596877a30fd6c17a1ae9f98218a53055ea:

  tcg: Remove TCG_TARGET_CON_SET_H (2021-02-02 12:12:43 -1000)


TCG backend constraints cleanup


Richard Henderson (24):
  tcg/tci: Drop L and S constraints
  tcg/tci: Remove TCG_TARGET_HAS_* ifdefs
  tcg/i386: Move constraint type check to tcg_target_const_match
  tcg/i386: Tidy register constraint definitions
  tcg/i386: Split out target constraints to tcg-target-con-str.h
  tcg/arm: Split out target constraints to tcg-target-con-str.h
  tcg/aarch64: Split out target constraints to tcg-target-con-str.h
  tcg/ppc: Split out target constraints to tcg-target-con-str.h
  tcg/tci: Split out target constraints to tcg-target-con-str.h
  tcg/mips: Split out target constraints to tcg-target-con-str.h
  tcg/riscv: Split out target constraints to tcg-target-con-str.h
  tcg/s390: Split out target constraints to tcg-target-con-str.h
  tcg/sparc: Split out target constraints to tcg-target-con-str.h
  tcg: Remove TCG_TARGET_CON_STR_H
  tcg/i386: Split out constraint sets to tcg-target-con-set.h
  tcg/aarch64: Split out constraint sets to tcg-target-con-set.h
  tcg/arm: Split out constraint sets to tcg-target-con-set.h
  tcg/mips: Split out constraint sets to tcg-target-con-set.h
  tcg/ppc: Split out constraint sets to tcg-target-con-set.h
  tcg/riscv: Split out constraint sets to tcg-target-con-set.h
  tcg/s390: Split out constraint sets to tcg-target-con-set.h
  tcg/sparc: Split out constraint sets to tcg-target-con-set.h
  tcg/tci: Split out constraint sets to tcg-target-con-set.h
  tcg: Remove TCG_TARGET_CON_SET_H

 tcg/aarch64/tcg-target-con-set.h |  36 
 tcg/aarch64/tcg-target-con-str.h |  24 +++
 tcg/arm/tcg-target-con-set.h |  35 
 tcg/arm/tcg-target-con-str.h |  22 +++
 tcg/i386/tcg-target-con-set.h|  55 ++
 tcg/i386/tcg-target-con-str.h|  33 
 tcg/mips/tcg-target-con-set.h|  36 
 tcg/mips/tcg-target-con-str.h|  24 +++
 tcg/ppc/tcg-target-con-set.h |  42 +
 tcg/ppc/tcg-target-con-str.h |  30 
 tcg/riscv/tcg-target-con-set.h   |  30 
 tcg/riscv/tcg-target-con-str.h   |  21 +++
 tcg/s390/tcg-target-con-set.h|  29 
 tcg/s390/tcg-target-con-str.h|  28 +++
 tcg/sparc/tcg-target-con-set.h   |  32 
 tcg/sparc/tcg-target-con-str.h   |  23 +++
 tcg/sparc/tcg-target.h   |   4 -
 tcg/tci/tcg-target-con-set.h |  25 +++
 tcg/tci/tcg-target-con-str.h |  11 ++
 tcg/tcg.c| 136 +--
 tcg/aarch64/tcg-target.c.inc | 137 ---
 tcg/arm/tcg-target.c.inc | 168 ++
 tcg/i386/tcg-target.c.inc| 317 +++---
 tcg/mips/tcg-target.c.inc| 173 ++-
 tcg/ppc/tcg-target.c.inc | 209 ---
 tcg/riscv/tcg-target.c.inc   | 135 ---
 tcg/s390/tcg-target.c.inc| 174 +++
 tcg/sparc/tcg-target.c.inc   | 156 ++---
 tcg/tci/tcg-target.c.inc | 359 ++-
 29 files changed, 1244 insertions(+), 1260 deletions(-)
 create mode 100644 tcg/aarch64/tcg-target-con-set.h
 create mode 100644 tcg/aarch64/tcg-target-con-str.h
 create mode 100644 tcg/arm/tcg-target-con-set.h
 create mode 100644 tcg/arm/tcg-target-con-str.h
 create mode 100644 tcg/i386/tcg-target-con-set.h
 create mode 100644 tcg/i386/tcg-target-con-str.h
 create mode 100644 tcg/mips/tcg-target-con-set.h
 create mode 100644 tcg/mips/tcg-target-con-str.h
 create mode 100644 tcg/ppc/tcg-target-con-set.h
 create mode 100644 tcg/ppc/tcg-target-con-str.h
 create mode 100644 tcg/riscv/tcg-target-con-set.h
 create mode 100644 tcg/riscv/tcg-target-con-str.h
 create mode 100644 tcg/s390/tcg-target-con-set.h
 create mode 100644 tcg/s390/tcg-target-con-str.h
 create mode 100644 tcg/sparc/tcg-target-con-set.h
 create mode 100644 tcg/sparc/tcg-target-con-str.h
 create mode 100644 tcg/tci/tcg-target-con-set.h
 create mode 100644 tcg/tci/tcg-target-con-str.h



Re: [PULL 00/24] tcg patch queue

2021-01-14 Thread Peter Maydell
On Thu, 14 Jan 2021 at 02:16, Richard Henderson
 wrote:
>
> The following changes since commit 45240eed4f064576d589ea60ebadf3c11d7ab891:
>
>   Merge remote-tracking branch 'remotes/armbru/tags/pull-yank-2021-01-13' 
> into staging (2021-01-13 14:19:24 +)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210113
>
> for you to fetch changes up to 4cacecaaa2bbf8af0967bd3eee43297fada475a9:
>
>   decodetree: Open files with encoding='utf-8' (2021-01-13 08:39:08 -1000)
>
> 
> Improvements to tcg constant handling.
> Force utf8 for decodetree.
>
> 


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.

-- PMM



[PULL 00/24] tcg patch queue

2021-01-13 Thread Richard Henderson
The following changes since commit 45240eed4f064576d589ea60ebadf3c11d7ab891:

  Merge remote-tracking branch 'remotes/armbru/tags/pull-yank-2021-01-13' into 
staging (2021-01-13 14:19:24 +)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210113

for you to fetch changes up to 4cacecaaa2bbf8af0967bd3eee43297fada475a9:

  decodetree: Open files with encoding='utf-8' (2021-01-13 08:39:08 -1000)


Improvements to tcg constant handling.
Force utf8 for decodetree.


Philippe Mathieu-Daudé (1):
  decodetree: Open files with encoding='utf-8'

Richard Henderson (23):
  tcg: Use tcg_out_dupi_vec from temp_load
  tcg: Increase tcg_out_dupi_vec immediate to int64_t
  tcg: Consolidate 3 bits into enum TCGTempKind
  tcg: Add temp_readonly
  tcg: Expand TCGTemp.val to 64-bits
  tcg: Rename struct tcg_temp_info to TempOptInfo
  tcg: Expand TempOptInfo to 64-bits
  tcg: Introduce TYPE_CONST temporaries
  tcg/optimize: Improve find_better_copy
  tcg/optimize: Adjust TempOptInfo allocation
  tcg/optimize: Use tcg_constant_internal with constant folding
  tcg: Convert tcg_gen_dupi_vec to TCG_CONST
  tcg: Use tcg_constant_i32 with icount expander
  tcg: Use tcg_constant_{i32,i64} with tcg int expanders
  tcg: Use tcg_constant_{i32,i64} with tcg plugins
  tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders
  tcg/tci: Add special tci_movi_{i32,i64} opcodes
  tcg: Remove movi and dupi opcodes
  tcg: Add tcg_reg_alloc_dup2
  tcg/i386: Use tcg_constant_vec with tcg vec expanders
  tcg: Remove tcg_gen_dup{8,16,32,64}i_vec
  tcg/ppc: Use tcg_constant_vec with tcg vec expanders
  tcg/aarch64: Use tcg_constant_vec with tcg vec expanders

 include/exec/gen-icount.h|  25 +--
 include/tcg/tcg-op.h |  17 +-
 include/tcg/tcg-opc.h|  11 +-
 include/tcg/tcg.h|  50 -
 accel/tcg/plugin-gen.c   |  49 ++---
 tcg/optimize.c   | 249 +++---
 tcg/tcg-op-gvec.c| 129 +---
 tcg/tcg-op-vec.c |  52 +
 tcg/tcg-op.c | 227 ++--
 tcg/tcg.c| 488 +--
 tcg/tci.c|   4 +-
 tcg/aarch64/tcg-target.c.inc |  32 +--
 tcg/arm/tcg-target.c.inc |   1 -
 tcg/i386/tcg-target.c.inc| 112 ++
 tcg/mips/tcg-target.c.inc|   2 -
 tcg/ppc/tcg-target.c.inc |  90 
 tcg/riscv/tcg-target.c.inc   |   2 -
 tcg/s390/tcg-target.c.inc|   2 -
 tcg/sparc/tcg-target.c.inc   |   2 -
 tcg/tci/tcg-target.c.inc |   6 +-
 scripts/decodetree.py|   9 +-
 21 files changed, 890 insertions(+), 669 deletions(-)