Re: [PULL 00/44] tcg patch queue, v2
On Tue, 14 Sept 2021 at 01:14, Richard Henderson wrote: > > Version 2 drops the bswap patch that caused such problems > on the various BSDs; I'll have to look at that further. > In the meantime I've also been collecting more pending > patches, and I might as well include them now. > > > r~ > > > The following changes since commit 7d79344d4fa44e520e6e89f8fed9a27d3d554a9b: > > Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' > into staging (2021-09-13 13:33:21 +0100) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210913 > > for you to fetch changes up to 5b778e9b4e0e0a37a86200e6af322b2a9b69c62e: > > tcg/arm: More use of the TCGReg enum (2021-09-13 12:09:05 -0700) > > > Fix translation race condition for user-only. > Fix tcg/i386 encoding for VPSLLVQ, VPSRLVQ. > Fix tcg/arm tcg_out_vec_op signature. > Fix tcg/ppc (32bit) build with clang. > Remove dupluate TCG_KICK_PERIOD definition. > Remove unused tcg_global_reg_new. > Restrict cpu_exec_interrupt and its callees to sysemu. > Cleanups for tcg/arm Hi; this has a conflict in target/arm/translate-a64.c -- would you mind respinning it? thanks -- PMM
[PULL 00/44] tcg patch queue, v2
Version 2 drops the bswap patch that caused such problems on the various BSDs; I'll have to look at that further. In the meantime I've also been collecting more pending patches, and I might as well include them now. r~ The following changes since commit 7d79344d4fa44e520e6e89f8fed9a27d3d554a9b: Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging (2021-09-13 13:33:21 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210913 for you to fetch changes up to 5b778e9b4e0e0a37a86200e6af322b2a9b69c62e: tcg/arm: More use of the TCGReg enum (2021-09-13 12:09:05 -0700) Fix translation race condition for user-only. Fix tcg/i386 encoding for VPSLLVQ, VPSRLVQ. Fix tcg/arm tcg_out_vec_op signature. Fix tcg/ppc (32bit) build with clang. Remove dupluate TCG_KICK_PERIOD definition. Remove unused tcg_global_reg_new. Restrict cpu_exec_interrupt and its callees to sysemu. Cleanups for tcg/arm. Bin Meng (1): tcg: Remove tcg_global_reg_new defines Ilya Leoshkevich (3): accel/tcg: Add DisasContextBase argument to translator_ld* accel/tcg: Clear PAGE_WRITE before translation accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts Jose R. Ziviani (1): tcg/arm: Fix tcg_out_vec_op function signature Luc Michel (1): accel/tcg: remove redundant TCG_KICK_PERIOD define Philippe Mathieu-Daudé (25): target/avr: Remove pointless use of CONFIG_USER_ONLY definition target/i386: Restrict sysemu-only fpu_helper helpers target/i386: Simplify TARGET_X86_64 #ifdef'ry target/xtensa: Restrict do_transaction_failed() to sysemu accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt target/alpha: Restrict cpu_exec_interrupt() handler to sysemu target/arm: Restrict cpu_exec_interrupt() handler to sysemu target/cris: Restrict cpu_exec_interrupt() handler to sysemu target/hppa: Restrict cpu_exec_interrupt() handler to sysemu target/i386: Restrict cpu_exec_interrupt() handler to sysemu target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder target/m68k: Restrict cpu_exec_interrupt() handler to sysemu target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu target/mips: Restrict cpu_exec_interrupt() handler to sysemu target/nios2: Restrict cpu_exec_interrupt() handler to sysemu target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu target/ppc: Restrict cpu_exec_interrupt() handler to sysemu target/riscv: Restrict cpu_exec_interrupt() handler to sysemu target/sh4: Restrict cpu_exec_interrupt() handler to sysemu target/sparc: Restrict cpu_exec_interrupt() handler to sysemu target/rx: Restrict cpu_exec_interrupt() handler to sysemu target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu user: Remove cpu_get_pic_interrupt() stubs user: Mark cpu_loop() with noreturn attribute Richard Henderson (13): tcg/i386: Split P_VEXW from P_REXW tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWIN tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF tcg/arm: Remove fallback definition of __ARM_ARCH tcg/arm: Standardize on tcg_out__{reg,imm} tcg/arm: Simplify use_armv5t_instructions tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call tcg/arm: Split out tcg_out_ldstm tcg/arm: Simplify usage of encode_imm tcg/arm: Drop inline markers tcg/arm: Give enum arm_cond_code_e a typedef and use it tcg/arm: More use of the ARMInsn enum tcg/arm: More use of the TCGReg enum bsd-user/qemu.h | 2 +- include/exec/translate-all.h | 1 + include/exec/translator.h | 44 +-- include/hw/core/tcg-cpu-ops.h | 26 +- include/tcg/tcg-op.h | 2 - linux-user/qemu.h | 2 +- target/alpha/cpu.h| 2 +- target/arm/arm_ldst.h | 12 +- target/arm/cpu.h | 3 +- target/cris/cpu.h | 2 +- target/hppa/cpu.h | 4 +- target/i386/cpu.h | 3 + target/i386/tcg/helper-tcg.h | 2 + target/m68k/cpu.h | 2 + target/microblaze/cpu.h | 2 + target/mips/tcg/tcg-internal.h| 5 +- target/openrisc/cpu.h | 5 +- target/ppc/cpu.h | 4 +- target/riscv/cpu.h| 2 +- target/rx/cpu.h | 2 + target/sh4/cpu.h | 4 +- target/xtensa/cpu.h