[PULL 00/46] target-arm queue
Big pullreq this week, since it's got RTH's PAN/UAO/ATS1E1 implementation in it, and also Philippe's raspi board model cleanup patchset, as well as a scattering of smaller stuff. -- PMM The following changes since commit 7ce9ce89930ce260af839fb3e3e5f9101f5c69a0: Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200212-pull-request' into staging (2020-02-13 11:06:32 +) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200213 for you to fetch changes up to dc7a88d0810ad272bdcd2e0869359af78fdd9114: target/arm: Implement ARMv8.1-VMID16 extension (2020-02-13 14:30:51 +) target-arm queue: * i.MX: Fix inverted sense of register bits in watchdog timer * i.MX: Add support for WDT on i.MX6 * arm/virt: cleanups to ACPI tables * Implement ARMv8.1-VMID16 extension * Implement ARMv8.1-PAN * Implement ARMv8.2-UAO * Implement ARMv8.2-ATS1E1 * ast2400/2500/2600: Wire up EHCI controllers * hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init * hw/arm/raspi: Clean up the board code Chen Qun (1): hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init Guenter Roeck (2): hw/arm: ast2400/ast2500: Wire up EHCI controllers hw/arm: ast2600: Wire up EHCI controllers Heyi Guo (7): bios-tables-test: prepare to change ARM virt ACPI DSDT arm/virt/acpi: remove meaningless sub device "RP0" from PCI0 arm/virt/acpi: remove _ADR from devices identified by _HID arm/acpi: fix PCI _PRT definition arm/acpi: fix duplicated _UID of PCI interrupt link devices arm/acpi: simplify the description of PCI _CRS virt/acpi: update golden masters for DSDT update Peter Maydell (1): target/arm: Implement ARMv8.1-VMID16 extension Philippe Mathieu-Daudé (13): hw/arm/raspi: Use BCM2708 machine type with pre Device Tree kernels hw/arm/raspi: Correct the board descriptions hw/arm/raspi: Extract the version from the board revision hw/arm/raspi: Extract the RAM size from the board revision hw/arm/raspi: Extract the processor type from the board revision hw/arm/raspi: Trivial code movement hw/arm/raspi: Make machines children of abstract RaspiMachineClass hw/arm/raspi: Make board_rev a field of RaspiMachineClass hw/arm/raspi: Let class_init() directly call raspi_machine_init() hw/arm/raspi: Set default RAM size to size encoded in board revision hw/arm/raspi: Extract the board model from the board revision hw/arm/raspi: Use a unique raspi_machine_class_init() method hw/arm/raspi: Extract the cores count from the board revision Richard Henderson (20): target/arm: Add arm_mmu_idx_is_stage1_of_2 target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled target/arm: Add isar_feature tests for PAN + ATS1E1 target/arm: Move LOR regdefs to file scope target/arm: Split out aarch32_cpsr_valid_mask target/arm: Mask CPSR_J when Jazelle is not enabled target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask target/arm: Use aarch32_cpsr_valid_mask in helper_exception_return target/arm: Remove CPSR_RESERVED target/arm: Introduce aarch64_pstate_valid_mask target/arm: Update MSR access for PAN target/arm: Update arm_mmu_idx_el for PAN target/arm: Enforce PAN semantics in get_S1prot target/arm: Set PAN bit as required on exception entry target/arm: Implement ATS1E1 system registers target/arm: Enable ARMv8.2-ATS1E1 in -cpu max target/arm: Add ID_AA64MMFR2_EL1 target/arm: Update MSR access to UAO target/arm: Implement UAO semantics target/arm: Enable ARMv8.2-UAO in -cpu max Roman Kapl (2): i.MX: Fix inverted register bits in wdt code. i.MX: Add support for WDT on i.MX6 include/hw/arm/aspeed_soc.h | 6 + include/hw/arm/fsl-imx6.h | 3 + target/arm/cpu-param.h| 2 +- target/arm/cpu.h | 95 --- target/arm/internals.h| 85 ++ hw/arm/aspeed_ast2600.c | 23 +++ hw/arm/aspeed_soc.c | 25 +++ hw/arm/fsl-imx6.c | 21 +++ hw/arm/raspi.c| 190 -- hw/arm/virt-acpi-build.c | 25 +-- hw/char/exynos4210_uart.c | 5 +- hw/misc/imx2_wdt.c| 2 +- target/arm/cpu.c | 4 + target/arm/cpu64.c| 10 ++ target/arm/helper-a64.c | 6 +- target/arm/helper.c | 327 +- target/arm/kvm64.c| 2 + target/arm/op_helper.c| 14 +- target/arm/translate-a64.c| 31 target/arm/translate.c| 42 +++-- tests/data/acpi/virt/DSDT | Bin 18462 ->
Re: [PULL 00/46] target-arm queue
On Thu, 13 Feb 2020 at 14:41, Peter Maydell wrote: > > Big pullreq this week, since it's got RTH's PAN/UAO/ATS1E1 > implementation in it, and also Philippe's raspi board model > cleanup patchset, as well as a scattering of smaller stuff. > > -- PMM > > > The following changes since commit 7ce9ce89930ce260af839fb3e3e5f9101f5c69a0: > > Merge remote-tracking branch 'remotes/kraxel/tags/ui-20200212-pull-request' > into staging (2020-02-13 11:06:32 +) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20200213 > > for you to fetch changes up to dc7a88d0810ad272bdcd2e0869359af78fdd9114: > > target/arm: Implement ARMv8.1-VMID16 extension (2020-02-13 14:30:51 +) > > > target-arm queue: > * i.MX: Fix inverted sense of register bits in watchdog timer > * i.MX: Add support for WDT on i.MX6 > * arm/virt: cleanups to ACPI tables > * Implement ARMv8.1-VMID16 extension > * Implement ARMv8.1-PAN > * Implement ARMv8.2-UAO > * Implement ARMv8.2-ATS1E1 > * ast2400/2500/2600: Wire up EHCI controllers > * hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init > * hw/arm/raspi: Clean up the board code > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/5.0 for any user-visible changes. -- PMM
[Qemu-devel] [PULL 00/46] target-arm queue
target-arm queue for softfreeze: this is quite big as I was on holiday last week, so this is all just sneaking in under the wire. I particularly wanted to get Philippe's patches in before freeze as that sort of code-movement patchset is painful to have to rebase. thanks -- PMM The following changes since commit ae9108f8f0746ce64d02afb1a216153a50926132: Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging (2019-07-01 15:55:40 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190701 for you to fetch changes up to 787a7e76c2e93a48c47b324fea592c9910a70483: target/arm: Declare some M-profile functions publicly (2019-07-01 17:29:01 +0100) target-arm queue: * hw/arm/boot: fix direct kernel boot with initrd * hw/arm/msf2-som: Exit when the cpu is not the expected one * i.mx7: fix bugs in PCI controller needed to boot recent kernels * aspeed: add RTC device * aspeed: fix some timer device bugs * aspeed: add swift-bmc board * aspeed: vic: Add support for legacy register interface * aspeed: add aspeed-xdma device * Add new sbsa-ref board for aarch64 * target/arm: code refactoring in preparation for support of compilation with TCG disabled Adriana Kobylak (1): aspeed: Add support for the swift-bmc board Andrew Jeffery (3): aspeed/timer: Status register contains reload for stopped timer aspeed/timer: Fix match calculations aspeed: vic: Add support for legacy register interface Andrew Jones (1): hw/arm/boot: fix direct kernel boot with initrd Andrey Smirnov (5): i.mx7d: Add no-op/unimplemented APBH DMA module i.mx7d: Add no-op/unimplemented PCIE PHY IP block pci: designware: Update MSI mapping unconditionally pci: designware: Update MSI mapping when MSI address changes i.mx7d: pci: Update PCI IRQ mapping to match HW Christian Svensson (1): aspeed/timer: Ensure positive muldiv delta Cédric Le Goater (7): aspeed: add a per SoC mapping for the interrupt space aspeed: add a per SoC mapping for the memory space aspeed: introduce a configurable number of CPU per machine aspeed: add support for multiple NICs aspeed: remove the "ram" link aspeed: add a RAM memory region container aspeed/smc: add a 'sdram_base' property Eddie James (1): hw/misc/aspeed_xdma: New device Hongbo Zhang (2): hw/arm: Add arm SBSA reference machine, skeleton part hw/arm: Add arm SBSA reference machine, devices part Jan Kiszka (1): hw/arm/virt: Add support for Cortex-A7 Joel Stanley (4): hw: timer: Add ASPEED RTC device hw/arm/aspeed: Add RTC to SoC aspeed/timer: Fix behaviour running Linux aspeed: Link SCU to the watchdog Philippe Mathieu-Daudé (19): hw/arm/msf2-som: Exit when the cpu is not the expected one target/arm: Makefile cleanup (Aarch64) target/arm: Makefile cleanup (ARM) target/arm: Makefile cleanup (KVM) target/arm: Makefile cleanup (softmmu) target/arm: Add copyright boilerplate target/arm/helper: Remove unused include target/arm: Fix multiline comment syntax target/arm: Fix coding style issues target/arm: Move CPU state dumping routines to cpu.c target/arm: Declare get_phys_addr() function publicly target/arm: Move TLB related routines to tlb_helper.c target/arm/vfp_helper: Move code around target/arm/vfp_helper: Extract vfp_set_fpscr_to_host() target/arm/vfp_helper: Extract vfp_set_fpscr_from_host() target/arm/vfp_helper: Restrict the SoftFloat use to TCG target/arm: Restrict PSCI to TCG target/arm: Declare arm_log_exception() function publicly target/arm: Declare some M-profile functions publicly Samuel Ortiz (1): target/arm: Move the DC ZVA helper into op_helper hw/arm/Makefile.objs| 1 + hw/misc/Makefile.objs | 1 + hw/timer/Makefile.objs | 2 +- target/arm/Makefile.objs| 24 +- include/hw/arm/aspeed_soc.h | 53 ++- include/hw/arm/fsl-imx7.h | 14 +- include/hw/misc/aspeed_xdma.h | 30 ++ include/hw/ssi/aspeed_smc.h | 3 + include/hw/timer/aspeed_rtc.h | 31 ++ include/hw/watchdog/wdt_aspeed.h| 1 + target/arm/cpu.h| 2 - target/arm/internals.h | 69 ++- target/arm/translate.h | 5 - hw/arm/aspeed.c | 76 +++- hw/arm/aspeed_soc.c | 262 +--- hw/arm/boot.c | 3 +- hw/arm/fsl-imx7.c | 11 + hw/arm/msf2-som.c | 1 + hw/arm/sbsa-ref.c | 806 hw/arm/virt.c
Re: [Qemu-devel] [PULL 00/46] target-arm queue
On Mon, 1 Jul 2019 at 17:39, Peter Maydell wrote: > > target-arm queue for softfreeze: this is quite big as I > was on holiday last week, so this is all just sneaking in > under the wire. I particularly wanted to get Philippe's > patches in before freeze as that sort of code-movement > patchset is painful to have to rebase. > > thanks > -- PMM > > The following changes since commit ae9108f8f0746ce64d02afb1a216153a50926132: > > Merge remote-tracking branch > 'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging > (2019-07-01 15:55:40 +0100) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git > tags/pull-target-arm-20190701 > > for you to fetch changes up to 787a7e76c2e93a48c47b324fea592c9910a70483: > > target/arm: Declare some M-profile functions publicly (2019-07-01 17:29:01 > +0100) > > > target-arm queue: > * hw/arm/boot: fix direct kernel boot with initrd > * hw/arm/msf2-som: Exit when the cpu is not the expected one > * i.mx7: fix bugs in PCI controller needed to boot recent kernels > * aspeed: add RTC device > * aspeed: fix some timer device bugs > * aspeed: add swift-bmc board > * aspeed: vic: Add support for legacy register interface > * aspeed: add aspeed-xdma device > * Add new sbsa-ref board for aarch64 > * target/arm: code refactoring in preparation for support of >compilation with TCG disabled Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1 for any user-visible changes. -- PMM
