[PULL 78/89] target/riscv: Don't modify SUM with is_debug

[Alistair Francis]

From: Richard Henderson <richard.hender...@linaro.org>

If we want to give the debugger a greater view of memory than
the cpu, we should simply disable the access check entirely,
not simply for this one corner case.

Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
Tested-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Message-Id: <20230325105429.1142530-23-richard.hender...@linaro.org>
Message-Id: <20230412114333.118895-23-richard.hender...@linaro.org>
Signed-off-by: Alistair Francis <alistair.fran...@wdc.com>
---
 target/riscv/cpu_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 6dc3fdf594..9a2b944990 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -823,7 +823,7 @@ static int get_physical_address(CPURISCVState *env, hwaddr 
*physical,
         }
         widened = 2;
     }
-    sum = mmuidx_sum(mmu_idx) || is_debug;
+    sum = mmuidx_sum(mmu_idx);
     switch (vm) {
     case VM_1_10_SV32:
       levels = 2; ptidxbits = 10; ptesize = 4; break;
-- 
2.40.0