[Qemu-devel] [Bug 1079080] Re: ARM instruction "srs" wrong behaviour
** Changed in: qemu Status: Fix Committed => Fix Released -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction "srs" wrong behaviour Status in QEMU: Fix Released Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : "Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode" Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
[Qemu-devel] [Bug 1079080] Re: ARM instruction srs wrong behaviour
** Changed in: qemu Status: Confirmed = Fix Committed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction srs wrong behaviour Status in QEMU: Fix Committed Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
[Qemu-devel] [Bug 1079080] Re: ARM instruction srs wrong behaviour
Thanks -- I've submitted a patch which fixes this: http://patchwork.ozlabs.org/patch/220748/ If you'd like to give me a name/email [format Full Name em...@wherever.com] I can credit you in a Reported-by: tag in the commit message... -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction srs wrong behaviour Status in QEMU: Confirmed Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
[Qemu-devel] [Bug 1079080] Re: ARM instruction srs wrong behaviour
You are welcome. Credit info you need: Cesson Vincent vces...@stmi.com Thank you for fixing it! -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction srs wrong behaviour Status in QEMU: Confirmed Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
[Qemu-devel] [Bug 1079080] Re: ARM instruction srs wrong behaviour
It looks like this is only a problem in Thumb mode; the equivalent bug in ARM mode was fixed in commit c67b6b71 back in 2009. Can you make the test case dtb and image available? That would help in testing... ** Changed in: qemu Status: New = Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction srs wrong behaviour Status in QEMU: Confirmed Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
[Qemu-devel] [Bug 1079080] Re: ARM instruction srs wrong behaviour
** Attachment added: test case dtb https://bugs.launchpad.net/qemu/+bug/1079080/+attachment/3528448/+files/xilinx_zynq.dtb -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction srs wrong behaviour Status in QEMU: Confirmed Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
[Qemu-devel] [Bug 1079080] Re: ARM instruction srs wrong behaviour
** Attachment added: test case image (similar image) https://bugs.launchpad.net/qemu/+bug/1079080/+attachment/3528447/+files/serial2 -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1079080 Title: ARM instruction srs wrong behaviour Status in QEMU: Confirmed Bug description: Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode Problem: When executing this instruction, the register stored is CPSR instead of SPSR. Context: Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1079080/+subscriptions
