Re: [Qemu-devel] [PATCH] arm-dis: Fix spelling in comments (iff - if)

[Stefan Hajnoczi]

On Tue, Apr 17, 2012 at 07:58:13PM +0200, Stefan Weil wrote:
 The spelling 'iff' is sometimes used for 'if and only if'.
 Even if that meaning could be applied here, it is not used
 consistently. It is also quite unusual to use 'if and only if'
 in technical documentation. Therefore a simple 'if' should be
 preferred here.
 
 Signed-off-by: Stefan Weil s...@weilnetz.de
 ---
  arm-dis.c |   22 +++---
  1 files changed, 11 insertions(+), 11 deletions(-)

Given the discussion about the origin of this code I think it makes
sense to leave the 'iff' to reduce spurious differences.

I am not taking this patch for now.  Feel free to discuss more if you do
think it should go in.

Stefan

[Qemu-devel] [PATCH] arm-dis: Fix spelling in comments (iff - if)

[Stefan Weil]

The spelling 'iff' is sometimes used for 'if and only if'.
Even if that meaning could be applied here, it is not used
consistently. It is also quite unusual to use 'if and only if'
in technical documentation. Therefore a simple 'if' should be
preferred here.

Signed-off-by: Stefan Weil s...@weilnetz.de
---
 arm-dis.c |   22 +++---
 1 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arm-dis.c b/arm-dis.c
index 6bc4d71..db15eca 100644
--- a/arm-dis.c
+++ b/arm-dis.c
@@ -130,8 +130,8 @@ struct opcode16
%zcodeprint a double precision VFP reg
  Codes: 0=Dm, 1=Dd, 2=Dn, 3=multi-list
 
-   %bitfield'c   print specified char iff bitfield is all ones
-   %bitfield`c   print specified char iff bitfield is all zeroes
+   %bitfield'c   print specified char if bitfield is all ones
+   %bitfield`c   print specified char if bitfield is all zeroes
%bitfield?ab...select from array of values in big endian order
 
%L  print as an iWMMXt N/M width field.
@@ -522,8 +522,8 @@ static const struct opcode32 coprocessor_opcodes[] =
%bitfieldTn   print short scaled width limited by n
%bitfieldUn   print long scaled width limited by n
 
-   %bitfield'c   print specified char iff bitfield is all ones
-   %bitfield`c   print specified char iff bitfield is all zeroes
+   %bitfield'c   print specified char if bitfield is all ones
+   %bitfield`c   print specified char if bitfield is all zeroes
%bitfield?ab...select from array of values in big endian order  */
 
 static const struct opcode32 neon_opcodes[] =
@@ -787,8 +787,8 @@ static const struct opcode32 neon_opcodes[] =
%c  print condition code (always bits 28-31)
%m  print register mask for ldm/stm instruction
%o  print operand2 (immediate or register + shift)
-   %p  print 'p' iff bits 12-15 are 15
-   %t  print 't' iff bit 21 set and bit 24 clear
+   %p  print 'p' if bits 12-15 are 15
+   %t  print 't' if bit 21 set and bit 24 clear
%B  print arm BLX(1) destination
%C  print the PSR sub type.
%U  print barrier type.
@@ -800,8 +800,8 @@ static const struct opcode32 neon_opcodes[] =
%bitfieldxprint the bitfield in hex
%bitfieldXprint the bitfield as 1 hex digit without 
leading 0x
 
-   %bitfield'c   print specified char iff bitfield is all ones
-   %bitfield`c   print specified char iff bitfield is all zeroes
+   %bitfield'c   print specified char if bitfield is all ones
+   %bitfield`c   print specified char if bitfield is all zeroes
%bitfield?ab...select from array of values in big endian order
 
%e   print arm SMI operand (bits 0..7,8..19).
@@ -1090,7 +1090,7 @@ static const struct opcode32 arm_opcodes[] =
%bitfielda print (bitfield * 4) as a pc-rel offset + decoded 
symbol
%bitfieldB print Thumb branch destination (signed displacement)
%bitfieldc print bitfield as a condition code
-   %bitnum'c print specified char iff bit is one
+   %bitnum'c print specified char if bit is one
%bitnum?abprint a if bit is one else print b.  */
 
 static const struct opcode16 thumb_opcodes[] =
@@ -1248,8 +1248,8 @@ static const struct opcode16 thumb_opcodes[] =
%bitfieldrprint bitfield as an ARM register
%bitfieldcprint bitfield as a condition code
 
-   %bitfield'c   print specified char iff bitfield is all ones
-   %bitfield`c   print specified char iff bitfield is all zeroes
+   %bitfield'c   print specified char if bitfield is all ones
+   %bitfield`c   print specified char if bitfield is all zeroes
%bitfield?ab... select from array of values in big endian order
 
With one exception at the bottom (done because BL and BLX(1) need
-- 
1.7.9

Re: [Qemu-devel] [PATCH] arm-dis: Fix spelling in comments (iff - if)

[Andreas Färber]

Am 17.04.2012 19:58, schrieb Stefan Weil:
 The spelling 'iff' is sometimes used for 'if and only if'.
 Even if that meaning could be applied here, it is not used
 consistently. It is also quite unusual to use 'if and only if'
 in technical documentation. Therefore a simple 'if' should be
 preferred here.
 
 Signed-off-by: Stefan Weil s...@weilnetz.de
 ---
  arm-dis.c |   22 +++---
  1 files changed, 11 insertions(+), 11 deletions(-)

Aren't the *-dis.c files imported from binutils? In that case I'd
suggest to stay in sync with how they write/wrote it.
(Would spelling fixes in comments be subject to the GPLv3?)

Andreas

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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH] arm-dis: Fix spelling in comments (iff - if)

[Peter Maydell]

On 17 April 2012 19:22, Andreas Färber afaer...@suse.de wrote:
 Am 17.04.2012 19:58, schrieb Stefan Weil:
 The spelling 'iff' is sometimes used for 'if and only if'.
 Even if that meaning could be applied here, it is not used
 consistently. It is also quite unusual to use 'if and only if'
 in technical documentation. Therefore a simple 'if' should be
 preferred here.

 Signed-off-by: Stefan Weil s...@weilnetz.de
 ---
  arm-dis.c |   22 +++---
  1 files changed, 11 insertions(+), 11 deletions(-)

 Aren't the *-dis.c files imported from binutils? In that case I'd
 suggest to stay in sync with how they write/wrote it.

Yes, arm-dis.c is from binutils. These comments still read 'iff'
in current binutils, as they have done since first introduced
in binutils 2.5 in 1994.

-- PMM