[Qemu-devel] [PATCH] sparc32 sun4m eccmemctl

2007-12-09 Thread Robert Reif

This patch adds sparc32 sun4m SMP ECC memory controller support.

Three files are attached:

The first is a diff to existing code.
The second is a diff for the new eccmemctl.c.
The third is the openboot outputs for the 3 systems that support this chip.

This patch is necessary for using sun openboot prom images because they
expect the device to be present and will fault when it's not there.

A prom node will need to be added to openbios for this chip.
Index: Makefile.target
===
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.230
diff -p -u -r1.230 Makefile.target
--- Makefile.target 2 Dec 2007 02:20:02 -   1.230
+++ Makefile.target 9 Dec 2007 14:03:20 -
@@ -482,7 +482,7 @@ VL_OBJS+= cirrus_vga.o parallel.o ptimer
 else
 VL_OBJS+= sun4m.o tcx.o pcnet.o iommu.o m48t59.o slavio_intctl.o
 VL_OBJS+= slavio_timer.o slavio_serial.o slavio_misc.o fdc.o esp.o 
sparc32_dma.o
-VL_OBJS+= cs4231.o ptimer.o
+VL_OBJS+= cs4231.o ptimer.o eccmemctl.o
 endif
 endif
 ifeq ($(TARGET_BASE_ARCH), arm)
Index: hw/sun4m.c
===
RCS file: /sources/qemu/qemu/hw/sun4m.c,v
retrieving revision 1.67
diff -p -u -r1.67 sun4m.c
--- hw/sun4m.c  4 Dec 2007 20:58:31 -   1.67
+++ hw/sun4m.c  9 Dec 2007 14:03:24 -
@@ -82,6 +82,8 @@ struct hwdef {
 uint32_t intbit_to_level[32];
 uint64_t max_mem;
 const char * const default_cpu_model;
+target_phys_addr_t ecc_base;
+uint32_t ecc_version;
 };
 
 /* TSC handling */
@@ -479,6 +481,9 @@ static void sun4m_hw_init(const struct h
 nvram_init(nvram, (uint8_t *)nd_table[0].macaddr, kernel_cmdline,
boot_device, RAM_size, kernel_size, graphic_width,
graphic_height, graphic_depth, hwdef-machine_id);
+
+if (hwdef-ecc_base != (target_phys_addr_t)-1)
+ecc_init(hwdef-ecc_base, hwdef-ecc_version);
 }
 
 static const struct hwdef hwdefs[] = {
@@ -517,6 +522,7 @@ static const struct hwdef hwdefs[] = {
 },
 .max_mem = 0x1000,
 .default_cpu_model = Fujitsu MB86904,
+.ecc_base = -1,
 },
 /* SS-10 */
 {
@@ -553,6 +559,8 @@ static const struct hwdef hwdefs[] = {
 },
 .max_mem = 0x, // XXX actually first 62GB ok
 .default_cpu_model = TI SuperSparc II,
+.ecc_base = 0xfULL,
+.ecc_version = 0x1000, // version 0, implementation 1
 },
 /* SS-600MP */
 {
@@ -589,6 +597,8 @@ static const struct hwdef hwdefs[] = {
 },
 .max_mem = 0x, // XXX actually first 62GB ok
 .default_cpu_model = TI SuperSparc II,
+.ecc_base = 0xfULL,
+.ecc_version = 0x, // version 0, implementation 0
 },
 };
 
Index: hw/sun4m.h
===
RCS file: /sources/qemu/qemu/hw/sun4m.h,v
retrieving revision 1.3
diff -p -u -r1.3 sun4m.h
--- hw/sun4m.h  4 Dec 2007 20:58:31 -   1.3
+++ hw/sun4m.h  9 Dec 2007 14:03:24 -
@@ -72,4 +72,7 @@ void espdma_memory_write(void *opaque, u
 void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
 qemu_irq irq, qemu_irq *reset);
 
+/* eccmemctl.c */
+void *ecc_init(target_phys_addr_t base, uint32_t version);
+
 #endif
--- qemu/hw/eccmemctl.c 1969-12-31 19:00:00.0 -0500
+++ qemu.ecc/hw/eccmemctl.c 2007-12-09 09:12:16.0 -0500
@@ -0,0 +1,266 @@
+/*
+ * QEMU Sparc Sun4m ECC memory controller emulation
+ *
+ * Copyright (c) 2007 Robert Reif
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include hw.h
+#include sun4m.h
+#include sysemu.h
+
+//#define DEBUG_ECC
+
+#ifdef DEBUG_ECC
+#define DPRINTF(fmt, args...)   \
+do { printf(ECC:  fmt , ##args); } while (0)
+#else
+#define DPRINTF(fmt, args...)
+#endif
+
+/* There are 3 versions 

Re: [Qemu-devel] [PATCH] sparc32 sun4m eccmemctl

2007-12-09 Thread Blue Swirl
On 12/9/07, Robert Reif [EMAIL PROTECTED] wrote:
 This patch adds sparc32 sun4m SMP ECC memory controller support.

Thanks, applied. I just moved the ecc_base after the other bases.

 Three files are attached:

 The first is a diff to existing code.
 The second is a diff for the new eccmemctl.c.

Please use same level diff for all, this was suitable for patch -p1
and the first one for patch -p0. I'd recommend using quilt (or maybe
git) for patch management, it will make your life easier.

 The third is the openboot outputs for the 3 systems that support this chip.

 This patch is necessary for using sun openboot prom images because they
 expect the device to be present and will fault when it's not there.

 A prom node will need to be added to openbios for this chip.

Thanks, I used these attributes to define the node, mc-type is probed
from the device.

It seems that Linux and OpenBSD don't care about this device but
NetBSD driver at least reads and prints the version.