Re: [Qemu-devel] [PATCH] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR

2019-02-07 Thread Peter Maydell 
On Tue, 5 Feb 2019 at 13:51, Aaron Lindsay OS
 wrote:
>
> This bug was introduced in:
> commit 5ecdd3e47cadae83a62dc92b472f1fe163b56f59
> target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
>
> Signed-off-by: Aaron Lindsay 
> Reported-by: Laurent Desnogues 




Applied to target-arm.next, thanks.

-- PMM

Re: [Qemu-devel] [PATCH] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR

2019-02-05 Thread Laurent Desnogues 
On Tue, Feb 5, 2019 at 2:51 PM Aaron Lindsay OS
 wrote:
>
> This bug was introduced in:
> commit 5ecdd3e47cadae83a62dc92b472f1fe163b56f59
> target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
>
> Signed-off-by: Aaron Lindsay 
> Reported-by: Laurent Desnogues 

Reviewed-by: Laurent Desnogues 

Thanks,

Laurent

> ---
>  target/arm/helper.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index d070879894..ec2d17093c 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5855,25 +5855,25 @@ void register_cp_regs_for_features(ARMCPU *cpu)
>  char *pmevtyper_name = g_strdup_printf("PMEVTYPER%d", i);
>  char *pmevtyper_el0_name = g_strdup_printf("PMEVTYPER%d_EL0", i);
>  ARMCPRegInfo pmev_regs[] = {
> -{ .name = pmevcntr_name, .cp = 15, .crn = 15,
> +{ .name = pmevcntr_name, .cp = 15, .crn = 14,
>.crm = 8 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7,
>.access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS,
>.readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn,
>.accessfn = pmreg_access },
>  { .name = pmevcntr_el0_name, .state = ARM_CP_STATE_AA64,
> -  .opc0 = 3, .opc1 = 3, .crn = 15, .crm = 8 | (3 & (i >> 3)),
> +  .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 8 | (3 & (i >> 3)),
>.opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access,
>.type = ARM_CP_IO,
>.readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn,
>.raw_readfn = pmevcntr_rawread,
>.raw_writefn = pmevcntr_rawwrite },
> -{ .name = pmevtyper_name, .cp = 15, .crn = 15,
> +{ .name = pmevtyper_name, .cp = 15, .crn = 14,
>.crm = 12 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7,
>.access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS,
>.readfn = pmevtyper_readfn, .writefn = pmevtyper_writefn,
>.accessfn = pmreg_access },
>  { .name = pmevtyper_el0_name, .state = ARM_CP_STATE_AA64,
> -  .opc0 = 3, .opc1 = 3, .crn = 15, .crm = 12 | (3 & (i >> 
> 3)),
> +  .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 12 | (3 & (i >> 
> 3)),
>.opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access,
>.type = ARM_CP_IO,
>.readfn = pmevtyper_readfn, .writefn = pmevtyper_writefn,
> --
> 2.20.1
>

[Qemu-devel] [PATCH] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR

2019-02-05 Thread Aaron Lindsay OS 
This bug was introduced in:
commit 5ecdd3e47cadae83a62dc92b472f1fe163b56f59
target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER

Signed-off-by: Aaron Lindsay 
Reported-by: Laurent Desnogues 
---
 target/arm/helper.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index d070879894..ec2d17093c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5855,25 +5855,25 @@ void register_cp_regs_for_features(ARMCPU *cpu)
 char *pmevtyper_name = g_strdup_printf("PMEVTYPER%d", i);
 char *pmevtyper_el0_name = g_strdup_printf("PMEVTYPER%d_EL0", i);
 ARMCPRegInfo pmev_regs[] = {
-{ .name = pmevcntr_name, .cp = 15, .crn = 15,
+{ .name = pmevcntr_name, .cp = 15, .crn = 14,
   .crm = 8 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7,
   .access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS,
   .readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn,
   .accessfn = pmreg_access },
 { .name = pmevcntr_el0_name, .state = ARM_CP_STATE_AA64,
-  .opc0 = 3, .opc1 = 3, .crn = 15, .crm = 8 | (3 & (i >> 3)),
+  .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 8 | (3 & (i >> 3)),
   .opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access,
   .type = ARM_CP_IO,
   .readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn,
   .raw_readfn = pmevcntr_rawread,
   .raw_writefn = pmevcntr_rawwrite },
-{ .name = pmevtyper_name, .cp = 15, .crn = 15,
+{ .name = pmevtyper_name, .cp = 15, .crn = 14,
   .crm = 12 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7,
   .access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS,
   .readfn = pmevtyper_readfn, .writefn = pmevtyper_writefn,
   .accessfn = pmreg_access },
 { .name = pmevtyper_el0_name, .state = ARM_CP_STATE_AA64,
-  .opc0 = 3, .opc1 = 3, .crn = 15, .crm = 12 | (3 & (i >> 3)),
+  .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 12 | (3 & (i >> 3)),
   .opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access,
   .type = ARM_CP_IO,
   .readfn = pmevtyper_readfn, .writefn = pmevtyper_writefn,
-- 
2.20.1