Re: [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
On Thu, 20 Feb 2014 12:34:00 + "Richard W.M. Jones" wrote: [...] > > The second bug is kind of interesting. If you add ~ 256 disks (using > virtio-scsi), then it looks as if the firmware crashes. The total > console output is below. It looks as if "c >" is some kind of prompt. Yes, that's the Open Firmware prompt of the SLOF firmware here. If you know how to program in Forth, you can use it to debug the system. > Populating /vdevice methods > Populating /vdevice/vty@3000 > Populating /vdevice/nvram@7100 > C0580\b\b\b\b\bC05A0\b\b\b\b\bPopulating /pci@8002000 > ^M Adapters on 08002000 > 00 (D) : 106b 003fserial bus [ usb-ohci ] > 00 0800 (D) : 1af4 1004virtio [ scsi ] > Populating /pci@8002000/scsi@1 >SCSI: Looking for devices > 100 DISK : "QEMU QEMU HARDDISK1.7." > 101 DISK : "QEMU QEMU HARDDISK1.7." > 102 DISK : "QEMU QEMU HARDDISK1.7." > 103 DISK : "QEMU QEMU HARDDISK1.7." > 104 DISK : "QEMU QEMU HARDDISK1.7." > 105 DISK : "QEMU QEMU HARDDISK1.7." > 106 DISK : "QEMU QEMU HARDDISK1.7." > 107 DISK : "QEMU QEMU HARDDISK1.7." > 108 DISK : "QEMU QEMU HARDDISK1.7." > C0600\b\b\b\b\bC0640\b\b\b\b\bC0690\b\b\b\b\bC06A0\b\b\b\b\bC06A8\b\b\b\b\bC06B0\b\b\b\b\bC06B8\b\b\b\b\bC06C0\b\b\b\b\b > So the last successful checkpoint seems to be C06C0 ? Looking at https://github.com/aik/SLOF/blob/master/board-qemu/slof/tree.fs there is not much critical stuff going on between that checkpoint and the next one, so I guess the firmware just ran out of internal memory. When you run into this crash again, could you try to enter the following commands? They might help to confirm my suspicion: .free .available here . Please also say how much memory you were using for the guest. Thomas
Re: [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
On Thu, Feb 20, 2014 at 10:23:42AM +, Richard W.M. Jones wrote: > I am now running a full libguestfs test which will take several hours, > but it looks as if -- even if this test fails -- it won't be because > of lack of emulation / missing instructions in qemu. The tests ran. I hit two bugs, but neither seems to be related to qemu emulation. Please push these patches into upstream qemu :-) One bug is in btrfs and is related to page size being different (and much larger) on ppc64. The second bug is kind of interesting. If you add ~ 256 disks (using virtio-scsi), then it looks as if the firmware crashes. The total console output is below. It looks as if "c >" is some kind of prompt. qemu spins using 100% of CPU after this. -- Populating /vdevice methods Populating /vdevice/vty@3000 Populating /vdevice/nvram@7100 C0580\b\b\b\b\bC05A0\b\b\b\b\bPopulating /pci@8002000 ^M Adapters on 08002000 00 (D) : 106b 003fserial bus [ usb-ohci ] 00 0800 (D) : 1af4 1004virtio [ scsi ] Populating /pci@8002000/scsi@1 SCSI: Looking for devices 100 DISK : "QEMU QEMU HARDDISK1.7." 101 DISK : "QEMU QEMU HARDDISK1.7." 102 DISK : "QEMU QEMU HARDDISK1.7." 103 DISK : "QEMU QEMU HARDDISK1.7." 104 DISK : "QEMU QEMU HARDDISK1.7." 105 DISK : "QEMU QEMU HARDDISK1.7." 106 DISK : "QEMU QEMU HARDDISK1.7." 107 DISK : "QEMU QEMU HARDDISK1.7." 108 DISK : "QEMU QEMU HARDDISK1.7." C0600\b\b\b\b\bC0640\b\b\b\b\bC0690\b\b\b\b\bC06A0\b\b\b\b\bC06A8\b\b\b\b\bC06B0\b\b\b\b\bC06B8\b\b\b\b\bC06C0\b\b\b\b\b ( 700 ) Program Exception [ 2e51cb00 ] R0 .. R7 R8 .. R15 R16 .. R23 R24 .. R31 2dca41ec 2dcfe058 0006 2e5198e0 2e5a91c0 2dcb3900 2dcbcb00 2dcb7b38 2dca0d10 2e51a050 2e51cb00 2dd121f0 2dcbabd8 2dcb5e48 2dcfe050 03d0 0056 0003 2e51cb00 2dcf2e4e 0007 2e5b0751 2e516010 0003 2dca0c30 2e50fae0 CR / XER LR / CTR SRR0 / SRR1DAR / DSISR 8488 2dca1d40 2dcb7b38 2dcb7b38 8008 c > \x1b7 -- Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones Read my programming blog: http://rwmj.wordpress.com Fedora now supports 80 OCaml packages (the OPEN alternative to F#)
Re: [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
Tom, I tested your patches [see below] and I found they work very well. They solve all the immediate problems that libguestfs was hitting with qemu not emulating certain POWER7 instructions. I am now running a full libguestfs test which will take several hours, but it looks as if -- even if this test fails -- it won't be because of lack of emulation / missing instructions in qemu. Thanks, Rich. 1258017 (HEAD, master) target-ppc: Fix xxpermdi When T==A or T==B a5a770e target-ppc: Altivec 2.07: Vector Permute and Exclusive OR d2235b6 target-ppc: Altivec 2.07: Vector SHA Sigma Instructions 823d8bc target-ppc: Altivec 2.07: AES Instructions de692f8 target-ppc: Altivec 2.07: Binary Coded Decimal Instructions e57670e target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum 7aa4e18 target-ppc: Altivec 2.07: Vector Gather Bits by Bytes 0407211 target-ppc: Altivec 2.07: Doubleword Compares fa643cd target-ppc: Altivec 2.07: vbpermq Instruction 3eefbc5 target-ppc: Altivec 2.07: Quadword Addition and Subtracation 679b19f target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift Instructions c33fb5a target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts 0d0e6fc target-ppc: Altivec 2.07: Vector Merge Instructions 535ddb7 target-ppc: Altivec 2.07: Unpack Signed Word Instructions 7c25020 target-ppc: Altivec 2.07: Pack Doubleword Instructions 1bfa3da target-ppc: Altivec 2.07: Vector Min/Max Doubleword Instructions 46b62bf target-ppc: Altivec 2.07: Vector Population Count Instructions 1208e47 target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes 7560038 target-ppc: Altivec 2.07: vmuluw Instruction 5219437 target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions e6d9b50 target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit Integers b00c954 target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo 59bae01 target-ppc: Altivec 2.07: Vector Logical Instructions 652fb6b target-ppc: Altivec 2.07: Add Support for R-Form Dual Instructions 1278f7d target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions 96645c6 target-ppc: Altivec 2.07: Add Support for Dual Altivec Instructions c7dc903 target-ppc: Altivec 2.07: Add GEN_VXFORM3 cc356ef target-ppc: Altivec 2.07: Update AVR Structure 236fce3 target-ppc: Altivec 2.07: Add Instruction Flag 1963af7 target-ppc: Add Store Quadword Conditional f74301d target-ppc: Add Load Quadword and Reserve 755065e target-ppc: Store Quadword b278fa5 target-ppc: Load Quadword aae0775 target-ppc: Add is_user_mode Utility Routine 702c075 target-ppc: Add Flag for ISA 2.07 Load/Store Quadword Instructions c103fc8 target-ppc: Add bctar Instruction cab1f12 target-ppc: Add Target Address SPR (TAR) to Power8 b904000 target-ppc: Add Flag for bctar e1adfb7 target-ppc: Add ISA2.06 lfiwzx Instruction ef84f63 target-ppc: Enable frsqrtes on Power7 and Power8 cfc3d6c target-ppc: Add ISA 2.06 ftsqrt 003634e target-ppc: Add ISA 2.06 ftdiv Instruction 8e28300 target-ppc: Add Flag for Power ISA V2.06 Floating Point Test Instructions 795d567 target-ppc: Fix and enable fri[mnpz] 7d69a6f target-ppc: Add ISA 2.06 fcfid[u][s] Instructions 18f088a target-ppc: Add ISA2.06 Float to Integer Instructions 6211a33 target-ppc: Add Flag for ISA V2.06 Floating Point Conversion bb961d5 target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions 42cb1ee target-ppc: Add ISA2.06 lbarx, lharx Instructions 3ee50eb target-ppc: Add Flag for ISA2.06 Atomic Instructions a38a0de target-ppc: Add ISA 2.06 divwe[o] Instructions 0964b12 target-ppc: Add ISA 2.06 divweu[o] Instructions 57c8cb1 target-ppc: Add ISA2.06 divde[o] Instructions e711f0f target-ppc: Add ISA2.06 divdeu[o] Instructions 4360fcf target-ppc: Add Flag for ISA2.06 Divide Extended Instructions 3813bf9 target-ppc: Add ISA2.06 bpermd Instruction 07cafd8 target-ppc: Scalar Non-Signalling Conversions e3b40b5 target-ppc: Scalar Round to Single Precision 622d9fc target-ppc: Floating Merge Word Instructions aab0146 target-ppc: Move To/From VSR Instructions f716b79 target-ppc: VSX Stage 4: Add xxleqv, xxlnand and xxlorc 613656c target-ppc: VSX Stage 4: Add xscvsxdsp and xscvuxdsp a80fde4 target-ppc: VSX Stage 4: Add Scalar SP Fused Multiply-Adds 0ce9239 target-ppc: VSX Stage 4: add xsrsqrtesp 32dc58c target-ppc: VSX Stage 4: Add xssqrtsp 71b162a target-ppc: VSX Stage 4: Add xsresp 78a46d8 target-ppc: VSX Stage 4: Add xsdivsp 1c71eda target-ppc: VSX Stage 4: Add xsmulsp c4ddfce target-ppc: VSX Stage 4: Add xsaddsp and xssubsp 76bec27 target-ppc: VSX Stage 4: Add stxsiwx and stxsspx 68de7cb target-ppc: VSX Stage 4: Refactor stxsdx 151f526 target-ppc: VSX Stage 4: Add lxsiwax, lxsiwzx and lxsspx bdfbd58 target-ppc: VSX Stage 4: Refactor lxsdx a918cda target-ppc: VSX Stage 4: Add VSX 2.07 Flag 18bf3f4 target-ppc: Add VSX Rounding Instructions 586ceee target-ppc: Add VSX ISA2.06 Integer Conversion Instructions 88d8f61 target-ppc: Add VSX Floating Point to Floating Point Conversion Instructions 3cd430d target-ppc: Add VSX Vector Compare In
Re: [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
On 2/18/2014 12:52 PM, Richard W.M. Jones wrote: > Hi Tom, > > I would love to test your latest non-upstream qemu patches, because > the better emulation of VSX may enable me to get libguestfs working on > ppc64p7. > > Do you have a public git tree anywhere which contains something > testable? The published patches no longer cleanly apply to qemu.git. > > Rich. > Rich: I think they still apply well mostly. There were some patches to softfloat that Peter had pulled in independently and they are now in qemu.git master. And I think there may be some conflicts now with those. So, specifically, you can ignore these from the VSX Stage 3 series (http://lists.nongnu.org/archive/html/qemu-devel/2014-01/msg00095.html): Subject: [V5 PATCH 04/22] softfloat: Fix float64_to_uint32 Subject: [V5 PATCH 01/22] softfloat: Fix float64_to_uint64 Subject: [V5 PATCH 03/22] softfloat: Fix float64_to_uint64_round_to_zero Subject: [V5 PATCH 02/22] softfloat: Add float32_to_uint64() Subject: [V5 PATCH 05/22] softfloat: Fix float64_to_uint32_round_to_zero and these from the ISA 2.06 series (http://lists.nongnu.org/archive/html/qemu-devel/2014-01/msg00596.html) Subject: [V4 PATCH 15/22] softfloat: Refactor code handling various rounding modes Subject: [V4 PATCH 14/22] softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal Subject: [V4 PATCH 13/22] softfloat: Fix exception flag handling for float32_to_float16() Subject: [V4 PATCH 16/22] softfloat: Add support for ties-away rounding I will send you directly a tarball of patches that you may find convenient.
Re: [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
Hi Tom, I would love to test your latest non-upstream qemu patches, because the better emulation of VSX may enable me to get libguestfs working on ppc64p7. Do you have a public git tree anywhere which contains something testable? The published patches no longer cleanly apply to qemu.git. Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones libguestfs lets you edit virtual machines. Supports shell scripting, bindings from many languages. http://libguestfs.org
[Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07
This patch series implements the changes to Altivec introduced by Power ISA Version 2.07. Tom Musta (28): target-ppc: Altivec 2.07: Add Instruction Flag target-ppc: Altivec 2.07: Update AVR Structure target-ppc: Altivec 2.07: Add GEN_VXFORM3 target-ppc: Altivec 2.07: Add Support for Dual Altivec Instructions target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions target-ppc: Altivec 2.07: Add Support for R-Form Dual Instructions target-ppc: Altivec 2.07: Vector Logical Instructions target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit Integers target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions target-ppc: Altivec 2.07: vmuluw Instruction target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes target-ppc: Altivec 2.07: Vector Population Count Instructions target-ppc: Altivec 2.07: Vector Min/Max Doubleword Instructions target-ppc: Altivec 2.07: Pack Doubleword Instructions target-ppc: Altivec 2.07: Unpack Signed Word Instructions target-ppc: Altivec 2.07: Vector Merge Instructions target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift Instructions target-ppc: Altivec 2.07: Quadword Addition and Subtracation target-ppc: Altivec 2.07: vbpermq Instruction target-ppc: Altivec 2.07: Doubleword Compares target-ppc: Altivec 2.07: Vector Gather Bits by Bytes target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum target-ppc: Altivec 2.07: Binary Coded Decimal Instructions target-ppc: Altivec 2.07: AES Instructions target-ppc: Altivec 2.07: Vector SHA Sigma Instructions target-ppc: Altivec 2.07: Vector Permute and Exclusive OR target-ppc/cpu.h|9 +- target-ppc/helper.h | 62 +++ target-ppc/int_helper.c | 1278 +-- target-ppc/translate.c | 348 - target-ppc/translate_init.c |2 +- 5 files changed, 1648 insertions(+), 51 deletions(-)
