Re: [Qemu-devel] [PATCH 02/19] hw/arm/boot: Honour CPU's address space for image loads

2018-02-23 Thread Richard Henderson
On 02/20/2018 10:03 AM, Peter Maydell wrote:
> Instead of loading kernels, device trees, and the like to
> the system address space, use the CPU's address space. This
> is important if we're trying to load the file to memory or
> via an alias memory region that is provided by an SoC
> object and thus not mapped into the system address space.
> 
> Signed-off-by: Peter Maydell 
> Reviewed-by: Philippe Mathieu-Daudé 
> ---
> Function name changed to arm_boot_address_space()
> rather than arm_boot_addressspace(), following irc
> conversation...
> ---
>  hw/arm/boot.c | 119 
> +-
>  1 file changed, 76 insertions(+), 43 deletions(-)

Reviewed-by: Richard Henderson 

r~



[Qemu-devel] [PATCH 02/19] hw/arm/boot: Honour CPU's address space for image loads

2018-02-20 Thread Peter Maydell
Instead of loading kernels, device trees, and the like to
the system address space, use the CPU's address space. This
is important if we're trying to load the file to memory or
via an alias memory region that is provided by an SoC
object and thus not mapped into the system address space.

Signed-off-by: Peter Maydell 
Reviewed-by: Philippe Mathieu-Daudé 
---
Function name changed to arm_boot_address_space()
rather than arm_boot_addressspace(), following irc
conversation...
---
 hw/arm/boot.c | 119 +-
 1 file changed, 76 insertions(+), 43 deletions(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 05108bc42f..6d0c92ab88 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -36,6 +36,25 @@
 #define ARM64_TEXT_OFFSET_OFFSET8
 #define ARM64_MAGIC_OFFSET  56
 
+static AddressSpace *arm_boot_address_space(ARMCPU *cpu,
+const struct arm_boot_info *info)
+{
+/* Return the address space to use for bootloader reads and writes.
+ * We prefer the secure address space if the CPU has it and we're
+ * going to boot the guest into it.
+ */
+int asidx;
+CPUState *cs = CPU(cpu);
+
+if (arm_feature(>env, ARM_FEATURE_EL3) && info->secure_boot) {
+asidx = ARMASIdx_S;
+} else {
+asidx = ARMASIdx_NS;
+}
+
+return cpu_get_address_space(cs, asidx);
+}
+
 typedef enum {
 FIXUP_NONE = 0, /* do nothing */
 FIXUP_TERMINATOR,   /* end of insns */
@@ -125,7 +144,8 @@ static const ARMInsnFixup smpboot[] = {
 };
 
 static void write_bootloader(const char *name, hwaddr addr,
- const ARMInsnFixup *insns, uint32_t *fixupcontext)
+ const ARMInsnFixup *insns, uint32_t *fixupcontext,
+ AddressSpace *as)
 {
 /* Fix up the specified bootloader fragment and write it into
  * guest memory using rom_add_blob_fixed(). fixupcontext is
@@ -164,7 +184,7 @@ static void write_bootloader(const char *name, hwaddr addr,
 code[i] = tswap32(insn);
 }
 
-rom_add_blob_fixed(name, code, len * sizeof(uint32_t), addr);
+rom_add_blob_fixed_as(name, code, len * sizeof(uint32_t), addr, as);
 
 g_free(code);
 }
@@ -173,6 +193,7 @@ static void default_write_secondary(ARMCPU *cpu,
 const struct arm_boot_info *info)
 {
 uint32_t fixupcontext[FIXUP_MAX];
+AddressSpace *as = arm_boot_address_space(cpu, info);
 
 fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr;
 fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr;
@@ -183,13 +204,14 @@ static void default_write_secondary(ARMCPU *cpu,
 }
 
 write_bootloader("smpboot", info->smp_loader_start,
- smpboot, fixupcontext);
+ smpboot, fixupcontext, as);
 }
 
 void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
 const struct arm_boot_info *info,
 hwaddr mvbar_addr)
 {
+AddressSpace *as = arm_boot_address_space(cpu, info);
 int n;
 uint32_t mvbar_blob[] = {
 /* mvbar_addr: secure monitor vectors
@@ -227,22 +249,23 @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
 for (n = 0; n < ARRAY_SIZE(mvbar_blob); n++) {
 mvbar_blob[n] = tswap32(mvbar_blob[n]);
 }
-rom_add_blob_fixed("board-setup-mvbar", mvbar_blob, sizeof(mvbar_blob),
-   mvbar_addr);
+rom_add_blob_fixed_as("board-setup-mvbar", mvbar_blob, sizeof(mvbar_blob),
+  mvbar_addr, as);
 
 for (n = 0; n < ARRAY_SIZE(board_setup_blob); n++) {
 board_setup_blob[n] = tswap32(board_setup_blob[n]);
 }
-rom_add_blob_fixed("board-setup", board_setup_blob,
-   sizeof(board_setup_blob), info->board_setup_addr);
+rom_add_blob_fixed_as("board-setup", board_setup_blob,
+  sizeof(board_setup_blob), info->board_setup_addr, 
as);
 }
 
 static void default_reset_secondary(ARMCPU *cpu,
 const struct arm_boot_info *info)
 {
+AddressSpace *as = arm_boot_address_space(cpu, info);
 CPUState *cs = CPU(cpu);
 
-address_space_stl_notdirty(_space_memory, info->smp_bootreg_addr,
+address_space_stl_notdirty(as, info->smp_bootreg_addr,
0, MEMTXATTRS_UNSPECIFIED, NULL);
 cpu_set_pc(cs, info->smp_loader_start);
 }
@@ -253,12 +276,12 @@ static inline bool have_dtb(const struct arm_boot_info 
*info)
 }
 
 #define WRITE_WORD(p, value) do { \
-address_space_stl_notdirty(_space_memory, p, value, \
+address_space_stl_notdirty(as, p, value, \
MEMTXATTRS_UNSPECIFIED, NULL);  \
 p += 4;   \
 } while (0)
 
-static void set_kernel_args(const struct arm_boot_info *info)
+static void