Re: [Qemu-devel] [PATCH 1/2] linux-headers: update to mainline 5c60a7389d79
On 2018年09月08日 04:48, Michael S. Tsirkin wrote: On Fri, Aug 17, 2018 at 04:37:06PM +0800, Jason Wang wrote: Sync linux headers to 5c60a7389d79 ("Merge tag 'for-linus-4.19-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux"). Signed-off-by: Jason Wang so there will be a new version of this as ioctl has changed, right? Want me to repost the series or another patch to sync it on top? Thanks
Re: [Qemu-devel] [PATCH 1/2] linux-headers: update to mainline 5c60a7389d79
On Fri, Aug 17, 2018 at 04:37:06PM +0800, Jason Wang wrote: > Sync linux headers to 5c60a7389d79 ("Merge tag 'for-linus-4.19-ofs1' of > git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux"). > > Signed-off-by: Jason Wang so there will be a new version of this as ioctl has changed, right? > --- > include/standard-headers/drm/drm_fourcc.h | 176 > + > include/standard-headers/linux/ethtool.h | 11 +- > include/standard-headers/linux/pci_regs.h | 4 +- > include/standard-headers/linux/virtio_config.h | 16 ++- > linux-headers/asm-generic/unistd.h | 4 +- > linux-headers/asm-mips/unistd.h| 18 ++- > linux-headers/asm-powerpc/kvm.h| 1 + > linux-headers/asm-powerpc/unistd.h | 1 + > linux-headers/asm-s390/unistd_32.h | 2 + > linux-headers/asm-s390/unistd_64.h | 2 + > linux-headers/linux/kvm.h | 1 + > linux-headers/linux/vhost.h| 18 +++ > 12 files changed, 238 insertions(+), 16 deletions(-) > > diff --git a/include/standard-headers/drm/drm_fourcc.h > b/include/standard-headers/drm/drm_fourcc.h > index 11912fd..b53f8d7 100644 > --- a/include/standard-headers/drm/drm_fourcc.h > +++ b/include/standard-headers/drm/drm_fourcc.h > @@ -182,6 +182,7 @@ extern "C" { > #define DRM_FORMAT_MOD_VENDOR_QCOM0x05 > #define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 > #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 > +#define DRM_FORMAT_MOD_VENDOR_ARM 0x08 > /* add more to the end as needed */ > > #define DRM_FORMAT_RESERVED((1ULL << 56) - 1) > @@ -297,6 +298,19 @@ extern "C" { > */ > #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILEfourcc_mod_code(SAMSUNG, 1) > > +/* > + * Qualcomm Compressed Format > + * > + * Refers to a compressed variant of the base format that is compressed. > + * Implementation may be platform and base-format specific. > + * > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > + * Pixel data pitch/stride is aligned with macrotile width. > + * Pixel data height is aligned with macrotile height. > + * Entire pixel data buffer is aligned with 4k(bytes). > + */ > +#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > + > /* Vivante framebuffer modifiers */ > > /* > @@ -384,6 +398,23 @@ extern "C" { > fourcc_mod_code(NVIDIA, 0x15) > > /* > + * Some Broadcom modifiers take parameters, for example the number of > + * vertical lines in the image. Reserve the lower 32 bits for modifier > + * type, and the next 24 bits for parameters. Top 8 bits are the > + * vendor code. > + */ > +#define __fourcc_mod_broadcom_param_shift 8 > +#define __fourcc_mod_broadcom_param_bits 48 > +#define fourcc_mod_broadcom_code(val, params) \ > + fourcc_mod_code(BROADCOM, uint64_t)params) << > __fourcc_mod_broadcom_param_shift) | val)) > +#define fourcc_mod_broadcom_param(m) \ > + ((int)(((m) >> __fourcc_mod_broadcom_param_shift) & \ > +((1ULL << __fourcc_mod_broadcom_param_bits) - 1))) > +#define fourcc_mod_broadcom_mod(m) \ > + ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) <<\ > + __fourcc_mod_broadcom_param_shift)) > + > +/* > * Broadcom VC4 "T" format > * > * This is the primary layout that the V3D GPU can texture from (it > @@ -404,6 +435,151 @@ extern "C" { > */ > #define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1) > > +/* > + * Broadcom SAND format > + * > + * This is the native format that the H.264 codec block uses. For VC4 > + * HVS, it is only valid for H.264 (NV12/21) and RGBA modes. > + * > + * The image can be considered to be split into columns, and the > + * columns are placed consecutively into memory. The width of those > + * columns can be either 32, 64, 128, or 256 pixels, but in practice > + * only 128 pixel columns are used. > + * > + * The pitch between the start of each column is set to optimally > + * switch between SDRAM banks. This is passed as the number of lines > + * of column width in the modifier (we can't use the stride value due > + * to various core checks that look at it , so you should set the > + * stride to width*cpp). > + * > + * Note that the column height for this format modifier is the same > + * for all of the planes, assuming that each column contains both Y > + * and UV. Some SAND-using hardware stores UV in a separate tiled > + * image from Y to reduce the column height, which is not supported > + * with these modifiers. > + */ > + > +#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > + fourcc_mod_broadcom_code(2, v) > +#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) \ > + fourcc_mod_broadcom_code(3, v) > +#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) \ > + fourcc_mod_broadcom_code(4, v) > +#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) \ > + fourcc_mod_broadcom_code(5, v) > + > +#define
[Qemu-devel] [PATCH 1/2] linux-headers: update to mainline 5c60a7389d79
Sync linux headers to 5c60a7389d79 ("Merge tag 'for-linus-4.19-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux"). Signed-off-by: Jason Wang --- include/standard-headers/drm/drm_fourcc.h | 176 + include/standard-headers/linux/ethtool.h | 11 +- include/standard-headers/linux/pci_regs.h | 4 +- include/standard-headers/linux/virtio_config.h | 16 ++- linux-headers/asm-generic/unistd.h | 4 +- linux-headers/asm-mips/unistd.h| 18 ++- linux-headers/asm-powerpc/kvm.h| 1 + linux-headers/asm-powerpc/unistd.h | 1 + linux-headers/asm-s390/unistd_32.h | 2 + linux-headers/asm-s390/unistd_64.h | 2 + linux-headers/linux/kvm.h | 1 + linux-headers/linux/vhost.h| 18 +++ 12 files changed, 238 insertions(+), 16 deletions(-) diff --git a/include/standard-headers/drm/drm_fourcc.h b/include/standard-headers/drm/drm_fourcc.h index 11912fd..b53f8d7 100644 --- a/include/standard-headers/drm/drm_fourcc.h +++ b/include/standard-headers/drm/drm_fourcc.h @@ -182,6 +182,7 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_QCOM0x05 #define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 +#define DRM_FORMAT_MOD_VENDOR_ARM 0x08 /* add more to the end as needed */ #define DRM_FORMAT_RESERVED ((1ULL << 56) - 1) @@ -297,6 +298,19 @@ extern "C" { */ #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1) +/* + * Qualcomm Compressed Format + * + * Refers to a compressed variant of the base format that is compressed. + * Implementation may be platform and base-format specific. + * + * Each macrotile consists of m x n (mostly 4 x 4) tiles. + * Pixel data pitch/stride is aligned with macrotile width. + * Pixel data height is aligned with macrotile height. + * Entire pixel data buffer is aligned with 4k(bytes). + */ +#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) + /* Vivante framebuffer modifiers */ /* @@ -384,6 +398,23 @@ extern "C" { fourcc_mod_code(NVIDIA, 0x15) /* + * Some Broadcom modifiers take parameters, for example the number of + * vertical lines in the image. Reserve the lower 32 bits for modifier + * type, and the next 24 bits for parameters. Top 8 bits are the + * vendor code. + */ +#define __fourcc_mod_broadcom_param_shift 8 +#define __fourcc_mod_broadcom_param_bits 48 +#define fourcc_mod_broadcom_code(val, params) \ + fourcc_mod_code(BROADCOM, uint64_t)params) << __fourcc_mod_broadcom_param_shift) | val)) +#define fourcc_mod_broadcom_param(m) \ + ((int)(((m) >> __fourcc_mod_broadcom_param_shift) & \ + ((1ULL << __fourcc_mod_broadcom_param_bits) - 1))) +#define fourcc_mod_broadcom_mod(m) \ + ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) <<\ +__fourcc_mod_broadcom_param_shift)) + +/* * Broadcom VC4 "T" format * * This is the primary layout that the V3D GPU can texture from (it @@ -404,6 +435,151 @@ extern "C" { */ #define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1) +/* + * Broadcom SAND format + * + * This is the native format that the H.264 codec block uses. For VC4 + * HVS, it is only valid for H.264 (NV12/21) and RGBA modes. + * + * The image can be considered to be split into columns, and the + * columns are placed consecutively into memory. The width of those + * columns can be either 32, 64, 128, or 256 pixels, but in practice + * only 128 pixel columns are used. + * + * The pitch between the start of each column is set to optimally + * switch between SDRAM banks. This is passed as the number of lines + * of column width in the modifier (we can't use the stride value due + * to various core checks that look at it , so you should set the + * stride to width*cpp). + * + * Note that the column height for this format modifier is the same + * for all of the planes, assuming that each column contains both Y + * and UV. Some SAND-using hardware stores UV in a separate tiled + * image from Y to reduce the column height, which is not supported + * with these modifiers. + */ + +#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(2, v) +#define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(3, v) +#define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(4, v) +#define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) \ + fourcc_mod_broadcom_code(5, v) + +#define DRM_FORMAT_MOD_BROADCOM_SAND32 \ + DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0) +#define DRM_FORMAT_MOD_BROADCOM_SAND64 \ + DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0) +#define DRM_FORMAT_MOD_BROADCOM_SAND128 \ + DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0) +#define DRM_FORMAT_MOD_BROADCOM_SAND256 \ +