Re: [Qemu-devel] [PATCH 13/15] tcg-sparc: Use defines for temporaries.
On Sun, Mar 25, 2012 at 22:27, Richard Henderson r...@twiddle.net wrote:
And change from %i4 to %g1 to remove a v8plus fixme.
Signed-off-by: Richard Henderson r...@twiddle.net
---
tcg/sparc/tcg-target.c | 110 ---
1 files changed, 56 insertions(+), 54 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 181ba26..896fab1 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -59,8 +59,11 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
};
#endif
+#define TCG_REG_TMP TCG_REG_G1
+#define TCG_REG_TMP2 TCG_REG_I5
+
#ifdef CONFIG_USE_GUEST_BASE
-# define TCG_GUEST_BASE_REG TCG_REG_I3
+# define TCG_GUEST_BASE_REG TCG_REG_I4
#else
# define TCG_GUEST_BASE_REG TCG_REG_G0
#endif
@@ -372,10 +375,10 @@ static inline void tcg_out_movi(TCGContext *s, TCGType
type,
tcg_out_sethi(s, ret, ~arg);
tcg_out_arithi(s, ret, ret, (arg 0x3ff) | -0x400, ARITH_XOR);
} else {
- tcg_out_movi_imm32(s, TCG_REG_I4, arg (TCG_TARGET_REG_BITS / 2));
- tcg_out_arithi(s, TCG_REG_I4, TCG_REG_I4, 32, SHIFT_SLLX);
- tcg_out_movi_imm32(s, ret, arg);
- tcg_out_arith(s, ret, ret, TCG_REG_I4, ARITH_OR);
+ tcg_out_movi_imm32(s, ret, arg (TCG_TARGET_REG_BITS / 2));
+ tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX);
+ tcg_out_movi_imm32(s, TCG_REG_TMP2, arg);
+ tcg_out_arith(s, ret, ret, TCG_REG_TMP2, ARITH_OR);
}
}
@@ -392,8 +395,8 @@ static inline void tcg_out_ldst(TCGContext *s, int ret,
int addr,
tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
INSN_IMM13(offset));
} else {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, offset);
- tcg_out_ldst_rr(s, ret, addr, TCG_REG_I5, op);
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, offset);
+ tcg_out_ldst_rr(s, ret, addr, TCG_REG_TMP, op);
}
}
@@ -435,8 +438,8 @@ static inline void tcg_out_addi(TCGContext *s, int reg,
tcg_target_long val)
if (check_fit_tl(val, 13))
tcg_out_arithi(s, reg, reg, val, ARITH_ADD);
else {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, val);
- tcg_out_arith(s, reg, reg, TCG_REG_I5, ARITH_ADD);
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, val);
+ tcg_out_arith(s, reg, reg, TCG_REG_TMP, ARITH_ADD);
}
}
}
@@ -448,8 +451,8 @@ static inline void tcg_out_andi(TCGContext *s, int rd,
int rs,
if (check_fit_tl(val, 13))
tcg_out_arithi(s, rd, rs, val, ARITH_AND);
else {
- tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_I5, val);
- tcg_out_arith(s, rd, rs, TCG_REG_I5, ARITH_AND);
+ tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, val);
+ tcg_out_arith(s, rd, rs, TCG_REG_TMP, ARITH_AND);
}
}
}
@@ -461,8 +464,8 @@ static void tcg_out_div32(TCGContext *s, int rd, int rs1,
if (uns) {
tcg_out_sety(s, TCG_REG_G0);
} else {
- tcg_out_arithi(s, TCG_REG_I5, rs1, 31, SHIFT_SRA);
- tcg_out_sety(s, TCG_REG_I5);
+ tcg_out_arithi(s, TCG_REG_TMP, rs1, 31, SHIFT_SRA);
+ tcg_out_sety(s, TCG_REG_TMP);
}
tcg_out_arithc(s, rd, rs1, val2, val2const,
@@ -608,8 +611,8 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond
cond, TCGArg ret,
case TCG_COND_GTU:
case TCG_COND_GEU:
if (c2const c2 != 0) {
- tcg_out_movi_imm13(s, TCG_REG_I5, c2);
- c2 = TCG_REG_I5;
+ tcg_out_movi_imm13(s, TCG_REG_TMP, c2);
+ c2 = TCG_REG_TMP;
}
t = c1, c1 = c2, c2 = t, c2const = 0;
cond = tcg_swap_cond(cond);
@@ -656,15 +659,15 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond
cond, TCGArg ret,
switch (cond) {
case TCG_COND_EQ:
- tcg_out_setcond_i32(s, TCG_COND_EQ, TCG_REG_I5, al, bl, blconst);
+ tcg_out_setcond_i32(s, TCG_COND_EQ, TCG_REG_TMP, al, bl, blconst);
tcg_out_setcond_i32(s, TCG_COND_EQ, ret, ah, bh, bhconst);
- tcg_out_arith(s, ret, ret, TCG_REG_I5, ARITH_AND);
+ tcg_out_arith(s, ret, ret, TCG_REG_TMP, ARITH_AND);
break;
case TCG_COND_NE:
- tcg_out_setcond_i32(s, TCG_COND_NE, TCG_REG_I5, al, al, blconst);
+ tcg_out_setcond_i32(s, TCG_COND_NE, TCG_REG_TMP, al, al, blconst);
tcg_out_setcond_i32(s, TCG_COND_NE, ret, ah, bh, bhconst);
- tcg_out_arith(s, ret, ret, TCG_REG_I5, ARITH_OR);
+ tcg_out_arith(s, ret, ret, TCG_REG_TMP, ARITH_OR);
break;
default:
@@ -964,8 +967,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, int sizeop)
#else
addr_reg = args[addrlo_idx];
if (TCG_TARGET_REG_BITS == 64 TARGET_LONG_BITS == 32) {
- tcg_out_arithi(s, TCG_REG_I5, addr_reg, 0, SHIFT_SRL);
- addr_reg = TCG_REG_I5;
+
[Qemu-devel] [PATCH 13/15] tcg-sparc: Use defines for temporaries.
And change from %i4 to %g1 to remove a v8plus fixme.
Signed-off-by: Richard Henderson r...@twiddle.net
---
tcg/sparc/tcg-target.c | 110 ---
1 files changed, 56 insertions(+), 54 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 181ba26..896fab1 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -59,8 +59,11 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
};
#endif
+#define TCG_REG_TMP TCG_REG_G1
+#define TCG_REG_TMP2 TCG_REG_I5
+
#ifdef CONFIG_USE_GUEST_BASE
-# define TCG_GUEST_BASE_REG TCG_REG_I3
+# define TCG_GUEST_BASE_REG TCG_REG_I4
#else
# define TCG_GUEST_BASE_REG TCG_REG_G0
#endif
@@ -372,10 +375,10 @@ static inline void tcg_out_movi(TCGContext *s, TCGType
type,
tcg_out_sethi(s, ret, ~arg);
tcg_out_arithi(s, ret, ret, (arg 0x3ff) | -0x400, ARITH_XOR);
} else {
-tcg_out_movi_imm32(s, TCG_REG_I4, arg (TCG_TARGET_REG_BITS / 2));
-tcg_out_arithi(s, TCG_REG_I4, TCG_REG_I4, 32, SHIFT_SLLX);
-tcg_out_movi_imm32(s, ret, arg);
-tcg_out_arith(s, ret, ret, TCG_REG_I4, ARITH_OR);
+tcg_out_movi_imm32(s, ret, arg (TCG_TARGET_REG_BITS / 2));
+tcg_out_arithi(s, ret, ret, 32, SHIFT_SLLX);
+tcg_out_movi_imm32(s, TCG_REG_TMP2, arg);
+tcg_out_arith(s, ret, ret, TCG_REG_TMP2, ARITH_OR);
}
}
@@ -392,8 +395,8 @@ static inline void tcg_out_ldst(TCGContext *s, int ret, int
addr,
tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
INSN_IMM13(offset));
} else {
-tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, offset);
-tcg_out_ldst_rr(s, ret, addr, TCG_REG_I5, op);
+tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, offset);
+tcg_out_ldst_rr(s, ret, addr, TCG_REG_TMP, op);
}
}
@@ -435,8 +438,8 @@ static inline void tcg_out_addi(TCGContext *s, int reg,
tcg_target_long val)
if (check_fit_tl(val, 13))
tcg_out_arithi(s, reg, reg, val, ARITH_ADD);
else {
-tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_I5, val);
-tcg_out_arith(s, reg, reg, TCG_REG_I5, ARITH_ADD);
+tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, val);
+tcg_out_arith(s, reg, reg, TCG_REG_TMP, ARITH_ADD);
}
}
}
@@ -448,8 +451,8 @@ static inline void tcg_out_andi(TCGContext *s, int rd, int
rs,
if (check_fit_tl(val, 13))
tcg_out_arithi(s, rd, rs, val, ARITH_AND);
else {
-tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_I5, val);
-tcg_out_arith(s, rd, rs, TCG_REG_I5, ARITH_AND);
+tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, val);
+tcg_out_arith(s, rd, rs, TCG_REG_TMP, ARITH_AND);
}
}
}
@@ -461,8 +464,8 @@ static void tcg_out_div32(TCGContext *s, int rd, int rs1,
if (uns) {
tcg_out_sety(s, TCG_REG_G0);
} else {
-tcg_out_arithi(s, TCG_REG_I5, rs1, 31, SHIFT_SRA);
-tcg_out_sety(s, TCG_REG_I5);
+tcg_out_arithi(s, TCG_REG_TMP, rs1, 31, SHIFT_SRA);
+tcg_out_sety(s, TCG_REG_TMP);
}
tcg_out_arithc(s, rd, rs1, val2, val2const,
@@ -608,8 +611,8 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond
cond, TCGArg ret,
case TCG_COND_GTU:
case TCG_COND_GEU:
if (c2const c2 != 0) {
-tcg_out_movi_imm13(s, TCG_REG_I5, c2);
-c2 = TCG_REG_I5;
+tcg_out_movi_imm13(s, TCG_REG_TMP, c2);
+c2 = TCG_REG_TMP;
}
t = c1, c1 = c2, c2 = t, c2const = 0;
cond = tcg_swap_cond(cond);
@@ -656,15 +659,15 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond
cond, TCGArg ret,
switch (cond) {
case TCG_COND_EQ:
-tcg_out_setcond_i32(s, TCG_COND_EQ, TCG_REG_I5, al, bl, blconst);
+tcg_out_setcond_i32(s, TCG_COND_EQ, TCG_REG_TMP, al, bl, blconst);
tcg_out_setcond_i32(s, TCG_COND_EQ, ret, ah, bh, bhconst);
-tcg_out_arith(s, ret, ret, TCG_REG_I5, ARITH_AND);
+tcg_out_arith(s, ret, ret, TCG_REG_TMP, ARITH_AND);
break;
case TCG_COND_NE:
-tcg_out_setcond_i32(s, TCG_COND_NE, TCG_REG_I5, al, al, blconst);
+tcg_out_setcond_i32(s, TCG_COND_NE, TCG_REG_TMP, al, al, blconst);
tcg_out_setcond_i32(s, TCG_COND_NE, ret, ah, bh, bhconst);
-tcg_out_arith(s, ret, ret, TCG_REG_I5, ARITH_OR);
+tcg_out_arith(s, ret, ret, TCG_REG_TMP, ARITH_OR);
break;
default:
@@ -964,8 +967,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, int sizeop)
#else
addr_reg = args[addrlo_idx];
if (TCG_TARGET_REG_BITS == 64 TARGET_LONG_BITS == 32) {
-tcg_out_arithi(s, TCG_REG_I5, addr_reg, 0, SHIFT_SRL);
-addr_reg = TCG_REG_I5;
+tcg_out_arithi(s, TCG_REG_TMP, addr_reg, 0, SHIFT_SRL);
+addr_reg = TCG_REG_TMP;
}
if (TCG_TARGET_REG_BITS == 32 sizeop == 3) {
