Re: [Qemu-devel] [PATCH 14/22] tcg: add CONFIG_TCG guards in headers
On 07/04/2017 01:12 AM, Paolo Bonzini wrote: From: Yang Zhong Add the CONFIG_TCG for exec-all.h. Since function tlb_set_page_with_attrs() is defined in ./accel/tcg/cputlb.c, which will be disabled if tcg is disabled. This function need be implemented in accel/stubs/tcg-stub.c for disable-tcg. Signed-off-by: Yang Zhong Signed-off-by: Paolo Bonzini --- v2: do not touch include/exec/helper-proto.h [Richard] include/exec/cpu-defs.h | 4 +++- include/exec/cputlb.h | 2 +- include/exec/exec-all.h | 53 ++--- 3 files changed, 32 insertions(+), 27 deletions(-) Reviewed-by: Richard Henderson r~
[Qemu-devel] [PATCH 14/22] tcg: add CONFIG_TCG guards in headers
From: Yang Zhong Add the CONFIG_TCG for exec-all.h. Since function tlb_set_page_with_attrs() is defined in ./accel/tcg/cputlb.c, which will be disabled if tcg is disabled. This function need be implemented in accel/stubs/tcg-stub.c for disable-tcg. Signed-off-by: Yang Zhong Signed-off-by: Paolo Bonzini --- v2: do not touch include/exec/helper-proto.h [Richard] include/exec/cpu-defs.h | 4 +++- include/exec/cputlb.h | 2 +- include/exec/exec-all.h | 53 ++--- 3 files changed, 32 insertions(+), 27 deletions(-) diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 5f4e303..bc8e7f8 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -25,7 +25,9 @@ #include "qemu/host-utils.h" #include "qemu/queue.h" +#ifdef CONFIG_TCG #include "tcg-target.h" +#endif #ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" #endif @@ -54,7 +56,7 @@ typedef uint64_t target_ulong; #error TARGET_LONG_SIZE undefined #endif -#if !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* use a fully associative victim tlb of 8 entries */ #define CPU_VTLB_SIZE 8 diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 3f94178..cf296d9 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -19,7 +19,7 @@ #ifndef CPUTLB_H #define CPUTLB_H -#if !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 0b56432..2f924f2 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -82,6 +82,34 @@ void cpu_reloading_memory_map(void); * Note that with KVM only one address space is supported. */ void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx); +/** + * tlb_set_page_with_attrs: + * @cpu: CPU to add this TLB entry for + * @vaddr: virtual address of page to add entry for + * @paddr: physical address of the page + * @attrs: memory transaction attributes + * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits) + * @mmu_idx: MMU index to insert TLB entry for + * @size: size of the page in bytes + * + * Add an entry to this CPU's TLB (a mapping from virtual address + * @vaddr to physical address @paddr) with the specified memory + * transaction attributes. This is generally called by the target CPU + * specific code after it has been called through the tlb_fill() + * entry point and performed a successful page table walk to find + * the physical address and attributes for the virtual address + * which provoked the TLB miss. + * + * At most one entry for a given virtual address is permitted. Only a + * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only + * used by tlb_flush_page. + */ +void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, + hwaddr paddr, MemTxAttrs attrs, + int prot, int mmu_idx, target_ulong size); +#endif + +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* cputlb.c */ /** * tlb_flush_page: @@ -205,31 +233,6 @@ void tlb_flush_by_mmuidx_all_cpus(CPUState *cpu, uint16_t idxmap); * depend on when the guests translation ends the TB. */ void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, uint16_t idxmap); -/** - * tlb_set_page_with_attrs: - * @cpu: CPU to add this TLB entry for - * @vaddr: virtual address of page to add entry for - * @paddr: physical address of the page - * @attrs: memory transaction attributes - * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits) - * @mmu_idx: MMU index to insert TLB entry for - * @size: size of the page in bytes - * - * Add an entry to this CPU's TLB (a mapping from virtual address - * @vaddr to physical address @paddr) with the specified memory - * transaction attributes. This is generally called by the target CPU - * specific code after it has been called through the tlb_fill() - * entry point and performed a successful page table walk to find - * the physical address and attributes for the virtual address - * which provoked the TLB miss. - * - * At most one entry for a given virtual address is permitted. Only a - * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only - * used by tlb_flush_page. - */ -void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, - hwaddr paddr, MemTxAttrs attrs, - int prot, int mmu_idx, target_ulong size); /* tlb_set_page: * * This function is equivalent to calling tlb_set_page_with_attrs() -- 1.8.3.1
Re: [Qemu-devel] [PATCH 14/22] tcg: add CONFIG_TCG guards in headers
On 03/07/2017 22:10, Richard Henderson wrote: > On 07/03/2017 09:34 AM, Paolo Bonzini wrote: >> --- a/include/exec/helper-proto.h >> +++ b/include/exec/helper-proto.h >> @@ -28,7 +28,9 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), >> dh_ctype(t2), dh_ctype(t3), \ >> #include "helper.h" >> #include "trace/generated-helpers.h" >> +#ifdef CONFIG_TCG >> #include "tcg-runtime.h" >> +#endif > > Do we really want to define any of the helpers if !CONFIG_TCG? > Perhaps it's the user of this header that needs adjustment. Indeed, this hunk is not needed anymore after my other cleanups. Paolo
Re: [Qemu-devel] [PATCH 14/22] tcg: add CONFIG_TCG guards in headers
On 07/03/2017 09:34 AM, Paolo Bonzini wrote: --- a/include/exec/helper-proto.h +++ b/include/exec/helper-proto.h @@ -28,7 +28,9 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ #include "helper.h" #include "trace/generated-helpers.h" +#ifdef CONFIG_TCG #include "tcg-runtime.h" +#endif Do we really want to define any of the helpers if !CONFIG_TCG? Perhaps it's the user of this header that needs adjustment. r~
[Qemu-devel] [PATCH 14/22] tcg: add CONFIG_TCG guards in headers
From: Yang Zhong Add the CONFIG_TCG for exec-all.h. Since function tlb_set_page_with_attrs() is defined in ./accel/tcg/cputlb.c, which will be disabled if tcg is disabled. This function need be implemented in accel/stubs/tcg-stub.c for disable-tcg. Signed-off-by: Yang Zhong Signed-off-by: Paolo Bonzini --- include/exec/cpu-defs.h | 4 +++- include/exec/cputlb.h | 2 +- include/exec/exec-all.h | 53 - include/exec/helper-proto.h | 2 ++ 4 files changed, 34 insertions(+), 27 deletions(-) diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 5f4e303..bc8e7f8 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -25,7 +25,9 @@ #include "qemu/host-utils.h" #include "qemu/queue.h" +#ifdef CONFIG_TCG #include "tcg-target.h" +#endif #ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" #endif @@ -54,7 +56,7 @@ typedef uint64_t target_ulong; #error TARGET_LONG_SIZE undefined #endif -#if !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* use a fully associative victim tlb of 8 entries */ #define CPU_VTLB_SIZE 8 diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 3f94178..cf296d9 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -19,7 +19,7 @@ #ifndef CPUTLB_H #define CPUTLB_H -#if !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 0b56432..2f924f2 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -82,6 +82,34 @@ void cpu_reloading_memory_map(void); * Note that with KVM only one address space is supported. */ void cpu_address_space_init(CPUState *cpu, AddressSpace *as, int asidx); +/** + * tlb_set_page_with_attrs: + * @cpu: CPU to add this TLB entry for + * @vaddr: virtual address of page to add entry for + * @paddr: physical address of the page + * @attrs: memory transaction attributes + * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits) + * @mmu_idx: MMU index to insert TLB entry for + * @size: size of the page in bytes + * + * Add an entry to this CPU's TLB (a mapping from virtual address + * @vaddr to physical address @paddr) with the specified memory + * transaction attributes. This is generally called by the target CPU + * specific code after it has been called through the tlb_fill() + * entry point and performed a successful page table walk to find + * the physical address and attributes for the virtual address + * which provoked the TLB miss. + * + * At most one entry for a given virtual address is permitted. Only a + * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only + * used by tlb_flush_page. + */ +void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, + hwaddr paddr, MemTxAttrs attrs, + int prot, int mmu_idx, target_ulong size); +#endif + +#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* cputlb.c */ /** * tlb_flush_page: @@ -205,31 +233,6 @@ void tlb_flush_by_mmuidx_all_cpus(CPUState *cpu, uint16_t idxmap); * depend on when the guests translation ends the TB. */ void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, uint16_t idxmap); -/** - * tlb_set_page_with_attrs: - * @cpu: CPU to add this TLB entry for - * @vaddr: virtual address of page to add entry for - * @paddr: physical address of the page - * @attrs: memory transaction attributes - * @prot: access permissions (PAGE_READ/PAGE_WRITE/PAGE_EXEC bits) - * @mmu_idx: MMU index to insert TLB entry for - * @size: size of the page in bytes - * - * Add an entry to this CPU's TLB (a mapping from virtual address - * @vaddr to physical address @paddr) with the specified memory - * transaction attributes. This is generally called by the target CPU - * specific code after it has been called through the tlb_fill() - * entry point and performed a successful page table walk to find - * the physical address and attributes for the virtual address - * which provoked the TLB miss. - * - * At most one entry for a given virtual address is permitted. Only a - * single TARGET_PAGE_SIZE region is mapped; the supplied @size is only - * used by tlb_flush_page. - */ -void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, - hwaddr paddr, MemTxAttrs attrs, - int prot, int mmu_idx, target_ulong size); /* tlb_set_page: * * This function is equivalent to calling tlb_set_page_with_attrs() diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h index 954bef8..417c7b0 100644 --- a/include/exec/helper-proto.h +++ b/include/exec/helper-proto.h @@ -28,7 +28,9 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ #include "helper.h" #include "trace/generated-
