Re: [Qemu-devel] [PATCH 18/22] target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline

2017-07-04 Thread Richard Henderson

On 07/04/2017 01:12 AM, Paolo Bonzini wrote:

From: Yang Zhong

Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific
tcg code.

Signed-off-by: Yang Zhong
Signed-off-by: Paolo Bonzini
---
v2: renamed tcg_update_mxcsr [Richard],
added missing call to cpu_post_load


Reviewed-by: Richard Henderson 


r~




[Qemu-devel] [PATCH 18/22] target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline

2017-07-04 Thread Paolo Bonzini
From: Yang Zhong 

Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific
tcg code.

Signed-off-by: Yang Zhong 
Signed-off-by: Paolo Bonzini 
---
v2: renamed tcg_update_mxcsr [Richard],
added missing call to cpu_post_load

 target/i386/cpu.h| 21 ++---
 target/i386/fpu_helper.c | 11 ++-
 target/i386/machine.c|  5 -
 3 files changed, 24 insertions(+), 13 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 8b3b535..66a363f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1594,7 +1594,6 @@ void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int 
intno, int is_int,
 /* cc_helper.c */
 extern const uint8_t parity_table[256];
 uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
-void update_fp_status(CPUX86State *env);
 
 static inline uint32_t cpu_compute_eflags(CPUX86State *env)
 {
@@ -1643,8 +1642,24 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env)
 }
 
 /* fpu_helper.c */
-void cpu_set_mxcsr(CPUX86State *env, uint32_t val);
-void cpu_set_fpuc(CPUX86State *env, uint16_t val);
+void update_fp_status(CPUX86State *env);
+void update_mxcsr_status(CPUX86State *env);
+
+static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+{
+env->mxcsr = mxcsr;
+if (tcg_enabled()) {
+update_mxcsr_status(env);
+}
+}
+
+static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
+{
+ env->fpuc = fpuc;
+ if (tcg_enabled()) {
+update_fp_status(env);
+ }
+}
 
 /* mem_helper.c */
 void helper_lock_init(void);
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c
index 34fb5fc..9014b6f 100644
--- a/target/i386/fpu_helper.c
+++ b/target/i386/fpu_helper.c
@@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, 
uint64_t mask)
 #define SSE_RC_CHOP 0x6000
 #define SSE_FZ  0x8000
 
-void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+void update_mxcsr_status(CPUX86State *env)
 {
+uint32_t mxcsr = env->mxcsr;
 int rnd_type;
 
-env->mxcsr = mxcsr;
-
 /* set rounding mode */
 switch (mxcsr & SSE_RC_MASK) {
 default:
@@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
 set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, >fp_status);
 }
 
-void cpu_set_fpuc(CPUX86State *env, uint16_t val)
-{
-env->fpuc = val;
-update_fp_status(env);
-}
-
 void helper_ldmxcsr(CPUX86State *env, uint32_t val)
 {
 cpu_set_mxcsr(env, val);
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 53587ae..e0417fe 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -280,7 +280,10 @@ static int cpu_post_load(void *opaque, int version_id)
 for(i = 0; i < 8; i++) {
 env->fptags[i] = (env->fptag_vmstate >> i) & 1;
 }
-update_fp_status(env);
+if (tcg_enabled()) {
+update_fp_status(env);
+update_mxcsr_status(env);
+}
 
 cpu_breakpoint_remove_all(cs, BP_CPU);
 cpu_watchpoint_remove_all(cs, BP_CPU);
-- 
1.8.3.1





Re: [Qemu-devel] [PATCH 18/22] target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline

2017-07-04 Thread Paolo Bonzini


On 03/07/2017 22:14, Richard Henderson wrote:
> On 07/03/2017 09:34 AM, Paolo Bonzini wrote:
>> +static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
>> +{
>> +env->mxcsr = mxcsr;
>> +if (tcg_enabled()) {
>> +tcg_update_mxcsr(env);
> 
> I'd prefer update_mxcsr_status for this new name.
> 
>> +}
>> +}
>> +
>> +static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
>> +{
>> + env->fpuc = fpuc;
>> + if (tcg_enabled()) {
>> +update_fp_status(env);
>> + }
>> +}
> 
> to match this, and to avoid the implication that it's a function in tcg/.

Good.  Also, the existing place in machine.c that calls update_fp_status
should call update_mxcsr_status as well.

Paolo



Re: [Qemu-devel] [PATCH 18/22] target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline

2017-07-03 Thread Richard Henderson

On 07/03/2017 09:34 AM, Paolo Bonzini wrote:

+static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+{
+env->mxcsr = mxcsr;
+if (tcg_enabled()) {
+tcg_update_mxcsr(env);


I'd prefer update_mxcsr_status for this new name.


+}
+}
+
+static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
+{
+ env->fpuc = fpuc;
+ if (tcg_enabled()) {
+update_fp_status(env);
+ }
+}


to match this, and to avoid the implication that it's a function in tcg/.


r~



[Qemu-devel] [PATCH 18/22] target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline

2017-07-03 Thread Paolo Bonzini
From: Yang Zhong 

Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific
tcg code.

Signed-off-by: Yang Zhong 
Signed-off-by: Paolo Bonzini 
---
 target/i386/cpu.h| 18 --
 target/i386/fpu_helper.c | 11 ++-
 2 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 8b3b535..67a6091 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1643,8 +1643,22 @@ static inline int32_t x86_get_a20_mask(CPUX86State *env)
 }
 
 /* fpu_helper.c */
-void cpu_set_mxcsr(CPUX86State *env, uint32_t val);
-void cpu_set_fpuc(CPUX86State *env, uint16_t val);
+void tcg_update_mxcsr(CPUX86State *env);
+static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+{
+env->mxcsr = mxcsr;
+if (tcg_enabled()) {
+tcg_update_mxcsr(env);
+}
+}
+
+static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
+{
+ env->fpuc = fpuc;
+ if (tcg_enabled()) {
+update_fp_status(env);
+ }
+}
 
 /* mem_helper.c */
 void helper_lock_init(void);
diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c
index 34fb5fc..f0facb9 100644
--- a/target/i386/fpu_helper.c
+++ b/target/i386/fpu_helper.c
@@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, 
uint64_t mask)
 #define SSE_RC_CHOP 0x6000
 #define SSE_FZ  0x8000
 
-void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
+void tcg_update_mxcsr(CPUX86State *env)
 {
+uint32_t mxcsr = env->mxcsr;
 int rnd_type;
 
-env->mxcsr = mxcsr;
-
 /* set rounding mode */
 switch (mxcsr & SSE_RC_MASK) {
 default:
@@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
 set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, >fp_status);
 }
 
-void cpu_set_fpuc(CPUX86State *env, uint16_t val)
-{
-env->fpuc = val;
-update_fp_status(env);
-}
-
 void helper_ldmxcsr(CPUX86State *env, uint32_t val)
 {
 cpu_set_mxcsr(env, val);
-- 
1.8.3.1