Re: [Qemu-devel] [PATCH 19/31] q35: add config space wmask for SMRAM and ESMRAMC

2015-05-12 Thread Gerd Hoffmann 
On Mo, 2015-05-11 at 15:49 +0200, Paolo Bonzini wrote:
 From: Gerd Hoffmann kra...@redhat.com

[ more verbose commit message for squashing in ]

Not all bits in SMRAM and ESMRAMC can be changed by the guest.
Add wmask defines accordingly and set them in mch_reset().

 Signed-off-by: Gerd Hoffmann kra...@redhat.com
 Signed-off-by: Paolo Bonzini pbonz...@redhat.com
 ---
  hw/pci-host/q35.c | 2 ++
  include/hw/pci-host/q35.h | 9 +
  2 files changed, 11 insertions(+)
 
 diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
 index 8471d7a..df0032e 100644
 --- a/hw/pci-host/q35.c
 +++ b/hw/pci-host/q35.c
 @@ -352,6 +352,8 @@ static void mch_reset(DeviceState *qdev)
  
  d-config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT;
  d-config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT;
 +d-wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK;
 +d-wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK;
  
  mch_update(mch);
  }
 diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
 index d3c7bbb..01b8492 100644
 --- a/include/hw/pci-host/q35.h
 +++ b/include/hw/pci-host/q35.h
 @@ -140,6 +140,11 @@ typedef struct Q35PCIHost {
  #define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END  0x10
  #define MCH_HOST_BRIDGE_SMRAM_DEFAULT   \
  MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG
 +#define MCH_HOST_BRIDGE_SMRAM_WMASK \
 +(MCH_HOST_BRIDGE_SMRAM_D_OPEN | \
 + MCH_HOST_BRIDGE_SMRAM_D_CLS |  \
 + MCH_HOST_BRIDGE_SMRAM_D_LCK |  \
 + MCH_HOST_BRIDGE_SMRAM_G_SMRAME)
  
  #define MCH_HOST_BRIDGE_ESMRAMC0x9e
  #define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME   ((uint8_t)(1  7))
 @@ -156,6 +161,10 @@ typedef struct Q35PCIHost {
  (MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE | \
   MCH_HOST_BRIDGE_ESMRAMC_SM_L1 |\
   MCH_HOST_BRIDGE_ESMRAMC_SM_L2)
 +#define MCH_HOST_BRIDGE_ESMRAMC_WMASK   \
 +(MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME | \
 + MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK | \
 + MCH_HOST_BRIDGE_ESMRAMC_T_EN)
  
  /* D1:F0 PCIE* port*/
  #define MCH_PCIE_DEV   1

[Qemu-devel] [PATCH 19/31] q35: add config space wmask for SMRAM and ESMRAMC

2015-05-11 Thread Paolo Bonzini 
From: Gerd Hoffmann kra...@redhat.com

Signed-off-by: Gerd Hoffmann kra...@redhat.com
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
 hw/pci-host/q35.c | 2 ++
 include/hw/pci-host/q35.h | 9 +
 2 files changed, 11 insertions(+)

diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 8471d7a..df0032e 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -352,6 +352,8 @@ static void mch_reset(DeviceState *qdev)
 
 d-config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT;
 d-config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT;
+d-wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK;
+d-wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK;
 
 mch_update(mch);
 }
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index d3c7bbb..01b8492 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -140,6 +140,11 @@ typedef struct Q35PCIHost {
 #define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END  0x10
 #define MCH_HOST_BRIDGE_SMRAM_DEFAULT   \
 MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG
+#define MCH_HOST_BRIDGE_SMRAM_WMASK \
+(MCH_HOST_BRIDGE_SMRAM_D_OPEN | \
+ MCH_HOST_BRIDGE_SMRAM_D_CLS |  \
+ MCH_HOST_BRIDGE_SMRAM_D_LCK |  \
+ MCH_HOST_BRIDGE_SMRAM_G_SMRAME)
 
 #define MCH_HOST_BRIDGE_ESMRAMC0x9e
 #define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME   ((uint8_t)(1  7))
@@ -156,6 +161,10 @@ typedef struct Q35PCIHost {
 (MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE | \
  MCH_HOST_BRIDGE_ESMRAMC_SM_L1 |\
  MCH_HOST_BRIDGE_ESMRAMC_SM_L2)
+#define MCH_HOST_BRIDGE_ESMRAMC_WMASK   \
+(MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME | \
+ MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK | \
+ MCH_HOST_BRIDGE_ESMRAMC_T_EN)
 
 /* D1:F0 PCIE* port*/
 #define MCH_PCIE_DEV   1
-- 
1.8.3.1