Re: [Qemu-devel] [PATCH 2/3] target-arm: Fix IL bit reported for Thumb coprocessor traps

[Sergey Fedorov]

On 05.02.2016 17:37, Peter Maydell wrote:
> All Thumb coprocessor instructions are 32 bits, so the IL
> bit in the syndrome register should be set. Pass false to the
> syn_* function's is_16bit argument rather than s->thumb
> so we report the correct IL bit.
>
> Signed-off-by: Peter Maydell 

Reviewed-by: Sergey Fedorov 

> ---
>  target-arm/translate.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 3ec758a..10792e8 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -7184,19 +7184,19 @@ static int disas_coproc_insn(DisasContext *s, 
> uint32_t insn)
>  case 14:
>  if (is64) {
>  syndrome = syn_cp14_rrt_trap(1, 0xe, opc1, crm, rt, rt2,
> - isread, s->thumb);
> + isread, false);
>  } else {
>  syndrome = syn_cp14_rt_trap(1, 0xe, opc1, opc2, crn, crm,
> -rt, isread, s->thumb);
> +rt, isread, false);
>  }
>  break;
>  case 15:
>  if (is64) {
>  syndrome = syn_cp15_rrt_trap(1, 0xe, opc1, crm, rt, rt2,
> - isread, s->thumb);
> + isread, false);
>  } else {
>  syndrome = syn_cp15_rt_trap(1, 0xe, opc1, opc2, crn, crm,
> -rt, isread, s->thumb);
> +rt, isread, false);
>  }
>  break;
>  default:

[Qemu-devel] [PATCH 2/3] target-arm: Fix IL bit reported for Thumb coprocessor traps

[Peter Maydell]

All Thumb coprocessor instructions are 32 bits, so the IL
bit in the syndrome register should be set. Pass false to the
syn_* function's is_16bit argument rather than s->thumb
so we report the correct IL bit.

Signed-off-by: Peter Maydell 
---
 target-arm/translate.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 3ec758a..10792e8 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7184,19 +7184,19 @@ static int disas_coproc_insn(DisasContext *s, uint32_t 
insn)
 case 14:
 if (is64) {
 syndrome = syn_cp14_rrt_trap(1, 0xe, opc1, crm, rt, rt2,
- isread, s->thumb);
+ isread, false);
 } else {
 syndrome = syn_cp14_rt_trap(1, 0xe, opc1, opc2, crn, crm,
-rt, isread, s->thumb);
+rt, isread, false);
 }
 break;
 case 15:
 if (is64) {
 syndrome = syn_cp15_rrt_trap(1, 0xe, opc1, crm, rt, rt2,
- isread, s->thumb);
+ isread, false);
 } else {
 syndrome = syn_cp15_rt_trap(1, 0xe, opc1, opc2, crn, crm,
-rt, isread, s->thumb);
+rt, isread, false);
 }
 break;
 default:
-- 
1.9.1