Re: [Qemu-devel] [PATCH 3/3] target-arm: Fix IL bit reported for Thumb VFP and Neon traps

[Sergey Fedorov]

On 05.02.2016 17:37, Peter Maydell wrote:
> All Thumb Neon and VFP instructions are 32 bits, so the IL
> bit in the syndrome register should be set. Pass false to the
> syn_* function's is_16bit argument rather than s->thumb
> so we report the correct IL bit.
>
> Signed-off-by: Peter Maydell 

Reviewed-by: Sergey Fedorov 

> ---
>  target-arm/translate.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 10792e8..fa8e22c 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -3077,7 +3077,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t 
> insn)
>   */
>  if (s->fp_excp_el) {
>  gen_exception_insn(s, 4, EXCP_UDEF,
> -   syn_fp_access_trap(1, 0xe, s->thumb), 
> s->fp_excp_el);
> +   syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
>  return 0;
>  }
>  
> @@ -4399,7 +4399,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t 
> insn)
>   */
>  if (s->fp_excp_el) {
>  gen_exception_insn(s, 4, EXCP_UDEF,
> -   syn_fp_access_trap(1, 0xe, s->thumb), 
> s->fp_excp_el);
> +   syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
>  return 0;
>  }
>  
> @@ -5137,7 +5137,7 @@ static int disas_neon_data_insn(DisasContext *s, 
> uint32_t insn)
>   */
>  if (s->fp_excp_el) {
>  gen_exception_insn(s, 4, EXCP_UDEF,
> -   syn_fp_access_trap(1, 0xe, s->thumb), 
> s->fp_excp_el);
> +   syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
>  return 0;
>  }
>  

[Qemu-devel] [PATCH 3/3] target-arm: Fix IL bit reported for Thumb VFP and Neon traps

[Peter Maydell]

All Thumb Neon and VFP instructions are 32 bits, so the IL
bit in the syndrome register should be set. Pass false to the
syn_* function's is_16bit argument rather than s->thumb
so we report the correct IL bit.

Signed-off-by: Peter Maydell 
---
 target-arm/translate.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 10792e8..fa8e22c 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -3077,7 +3077,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
  */
 if (s->fp_excp_el) {
 gen_exception_insn(s, 4, EXCP_UDEF,
-   syn_fp_access_trap(1, 0xe, s->thumb), 
s->fp_excp_el);
+   syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
 return 0;
 }
 
@@ -4399,7 +4399,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t 
insn)
  */
 if (s->fp_excp_el) {
 gen_exception_insn(s, 4, EXCP_UDEF,
-   syn_fp_access_trap(1, 0xe, s->thumb), 
s->fp_excp_el);
+   syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
 return 0;
 }
 
@@ -5137,7 +5137,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t 
insn)
  */
 if (s->fp_excp_el) {
 gen_exception_insn(s, 4, EXCP_UDEF,
-   syn_fp_access_trap(1, 0xe, s->thumb), 
s->fp_excp_el);
+   syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
 return 0;
 }
 
-- 
1.9.1