Re: [Qemu-devel] [PATCH 7/7] prep: QOM'ify System I/O

2013-05-04 Thread Hervé Poussineau

Andreas Färber a écrit :

Am 02.05.2013 22:09, schrieb Hervé Poussineau:

Most of the functionality is extracted from hw/ppc/prep.c.
Also add support for board identification/equipment registers.

Document it for the IBM 43p emulation.

Cc: Julio Guerra gu...@julio.in
Signed-off-by: Hervé Poussineau hpous...@reactos.org
---
 docs/ibm_43p.cfg   |5 +
 hw/ppc/Makefile.objs   |1 +
 hw/ppc/prep_systemio.c |  298 
 trace-events   |4 +
 4 files changed, 308 insertions(+)
 create mode 100644 hw/ppc/prep_systemio.c


Haven't reviewed the full patch yet, but since this is not modifying
hw/ppc/prep.c, it is duplicating code rather than QOM'ifying the
existing code.

Have you looked into Julio's patch whom you CC? I'm still not sure how
to solve things for 1.5 (and this series a consider -next).


Yes, I've partly taken Julio's patch into account, ie port 0x92 is now 
read/write. However, I didn't change the way the reset is done due to 
missing agrement of how it should be done: this is touching on the same 
soft reset topic that I am awaiting the outcome for x86. [1]


Moreover, registers emulated are not exactly the same as in hw/ppc/prep.c:
Registers not present in hw/ppc/prep_systemio.c:
0x800: Motorola CPU configuration register
0x802: Motorola base module feature register
0x803: Motorola base module status register
0x823: Something related to no L2 cache?
Those seem specific to Motorola, so they probably belong to another device.

New registers added to hw/ppc/prep_systemio.c:
0x818: Key lock (Read Only)
0x852: System Board Identification (Read Only)

I'm not really sure of impacts of changing 'prep' machine to remove some 
registers and adding new ones, so I prefered to keep it as is. However, 
if you think that I should use the QOM'ified System I/O device in 'prep' 
machine (and this will change emulated machine), I'll do it.


Hervé

[1] https://lists.gnu.org/archive/html/qemu-devel/2013-04/msg03359.html




Re: [Qemu-devel] [PATCH 7/7] prep: QOM'ify System I/O

2013-05-03 Thread Andreas Färber
Am 02.05.2013 22:09, schrieb Hervé Poussineau:
 Most of the functionality is extracted from hw/ppc/prep.c.
 Also add support for board identification/equipment registers.
 
 Document it for the IBM 43p emulation.
 
 Cc: Julio Guerra gu...@julio.in
 Signed-off-by: Hervé Poussineau hpous...@reactos.org
 ---
  docs/ibm_43p.cfg   |5 +
  hw/ppc/Makefile.objs   |1 +
  hw/ppc/prep_systemio.c |  298 
 
  trace-events   |4 +
  4 files changed, 308 insertions(+)
  create mode 100644 hw/ppc/prep_systemio.c

Haven't reviewed the full patch yet, but since this is not modifying
hw/ppc/prep.c, it is duplicating code rather than QOM'ifying the
existing code.

Have you looked into Julio's patch whom you CC? I'm still not sure how
to solve things for 1.5 (and this series a consider -next).

Regards,
Andreas



[Qemu-devel] [PATCH 7/7] prep: QOM'ify System I/O

2013-05-02 Thread Hervé Poussineau
Most of the functionality is extracted from hw/ppc/prep.c.
Also add support for board identification/equipment registers.

Document it for the IBM 43p emulation.

Cc: Julio Guerra gu...@julio.in
Signed-off-by: Hervé Poussineau hpous...@reactos.org
---
 docs/ibm_43p.cfg   |5 +
 hw/ppc/Makefile.objs   |1 +
 hw/ppc/prep_systemio.c |  298 
 trace-events   |4 +
 4 files changed, 308 insertions(+)
 create mode 100644 hw/ppc/prep_systemio.c

diff --git a/docs/ibm_43p.cfg b/docs/ibm_43p.cfg
index 70bbfdb..653d50b 100644
--- a/docs/ibm_43p.cfg
+++ b/docs/ibm_43p.cfg
@@ -36,3 +36,8 @@
   iobase = 0x170
   iobase2 = 0x376
   irq = 15
+
+[device]
+  driver = prep-systemio
+  ibm-planar-id = 0xc0
+  equipment = 0xff
diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index be00d1d..cd1eb1b 100644
--- a/hw/ppc/Makefile.objs
+++ b/hw/ppc/Makefile.objs
@@ -9,6 +9,7 @@ obj-y += ppc405_boards.o ppc4xx_devs.o ppc405_uc.o 
ppc440_bamboo.o
 obj-y += ppc4xx_pci.o
 # PReP
 obj-y += prep.o
+obj-y += prep_systemio.o
 # OldWorld PowerMac
 obj-y += mac_oldworld.o
 # NewWorld PowerMac
diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c
new file mode 100644
index 000..1ea511c
--- /dev/null
+++ b/hw/ppc/prep_systemio.c
@@ -0,0 +1,298 @@
+/*
+ * QEMU PReP System I/O emulation
+ *
+ * Copyright (c) 2003-2007 Jocelyn Mayer
+ * Copyright (c) 2010-2012 Herve Poussineau
+ * Copyright (c) 2010-2011 Andreas Faerber
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include hw/isa/isa.h
+#include exec/address-spaces.h
+#include qemu/error-report.h /* for error_report() */
+#include sysemu/sysemu.h /* for vm_stop() */
+#include trace.h
+
+#define TYPE_PREP_SYSTEMIO prep-systemio
+#define PREP_SYSTEMIO(obj) \
+OBJECT_CHECK(PrepSystemIoState, (obj), TYPE_PREP_SYSTEMIO)
+
+/* Bit as defined in PowerPC Reference Plaform v1.1, sect. 6.1.5, p. 132 */
+#define BIT(n) (1  (7 - (n)))
+
+typedef struct PrepSystemIoState {
+ISADevice parent_obj;
+MemoryRegion ppc_parity_mem;
+
+qemu_irq non_contiguous_io_map_irq;
+uint8_t sreset; /* 0x0092 */
+uint8_t equipment; /* 0x080c */
+uint8_t system_control; /* 0x081c */
+uint8_t iomap_type; /* 0x0850 */
+uint8_t ibm_planar_id; /* 0x0852 */
+qemu_irq softreset_irq;
+} PrepSystemIoState;
+
+/* PORT 0092 -- Special Port 92 (Read/Write) */
+
+enum {
+PORT0092_SOFTRESET  = BIT(7),
+PORT0092_LE_MODE= BIT(6),
+};
+
+static void prep_port0092_write(void *opaque, uint32_t addr, uint32_t val)
+{
+PrepSystemIoState *s = opaque;
+
+trace_prep_systemio_write(addr, val);
+
+if ((val  PORT0092_SOFTRESET) != 0) {
+qemu_irq_raise(s-softreset_irq);
+s-sreset = 1;
+} else {
+qemu_irq_lower(s-softreset_irq);
+s-sreset = 0;
+}
+
+if ((val  PORT0092_LE_MODE) != 0) {
+/* XXX Not supported yet */
+error_report(little-endian mode not supported);
+vm_stop(RUN_STATE_PAUSED);
+} else {
+/* Nothing to do */
+}
+}
+
+static uint32_t prep_port0092_read(void *opaque, uint32_t addr)
+{
+PrepSystemIoState *s = opaque;
+/* XXX LE mode unsupported */
+trace_prep_systemio_read(addr, 0);
+return s-sreset;
+}
+
+/* PORT 0808 -- Hardfile Light Register (Write Only) */
+
+enum {
+PORT0808_HARDFILE_LIGHT_ON  = BIT(7),
+};
+
+static void prep_port0808_write(void *opaque, uint32_t addr, uint32_t val)
+{
+trace_prep_systemio_write(addr, val);
+}
+
+/* PORT 0810 -- Password Protect 1 Register (Write Only) */
+
+/* reset by port 0x4D in the SIO */
+static void prep_port0810_write(void *opaque, uint32_t addr, uint32_t val)
+{
+trace_prep_systemio_write(addr, val);
+}
+
+/* PORT 0812 -- Password Protect 2 Register (Write Only) */
+
+/* reset by port 0x4D in the SIO */
+static void prep_port0812_write(void *opaque, uint32_t addr, uint32_t val)
+{
+