[Qemu-devel] [PATCH 8/8] target-ppc: Some support for dumping TLB_EMB TLBs
From: François Revol re...@free.fr
Add mmubooke_dump_mmu().
TODO: Add printing of individual flags.
Signed-off-by: François Revol re...@free.fr
[agraf: fix coding style]
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/helper.c | 50 ++
1 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index c610ce3..e97e496 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1466,6 +1466,53 @@ static const char *book3e_tsize_to_str[32] = {
1T, 2T
};
+static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
+ CPUPPCState *env)
+{
+ppcemb_tlb_t *entry;
+int i;
+
+if (kvm_enabled() !env-kvm_sw_tlb) {
+cpu_fprintf(f, Cannot access KVM TLB\n);
+return;
+}
+
+cpu_fprintf(f, \nTLB:\n);
+cpu_fprintf(f, Effective Physical Size PID Prot
+Attr\n);
+
+entry = env-tlb.tlbe[0];
+for (i = 0; i env-nb_tlb; i++, entry++) {
+target_phys_addr_t ea, pa;
+target_ulong mask;
+uint64_t size = (uint64_t)entry-size;
+char size_buf[20];
+
+/* Check valid flag */
+if (!(entry-prot PAGE_VALID)) {
+continue;
+}
+
+mask = ~(entry-size - 1);
+ea = entry-EPN mask;
+pa = entry-RPN mask;
+#if (TARGET_PHYS_ADDR_BITS = 36)
+/* Extend the physical address to 36 bits */
+pa |= (target_phys_addr_t)(entry-RPN 0xF) 32;
+#endif
+size /= 1024;
+if (size = 1024) {
+snprintf(size_buf, sizeof(size_buf), %3 PRId64 M, size / 1024);
+} else {
+snprintf(size_buf, sizeof(size_buf), %3 PRId64 k, size);
+}
+cpu_fprintf(f, 0x%016 PRIx64 0x%016 PRIx64 %s %-5u %08x %08x\n,
+(uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry-PID,
+entry-prot, entry-attr);
+}
+
+}
+
static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf,
CPUPPCState *env, int tlbn, int offset,
int tlbsize)
@@ -1561,6 +1608,9 @@ static void mmubooks_dump_mmu(FILE *f, fprintf_function
cpu_fprintf,
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
{
switch (env-mmu_model) {
+case POWERPC_MMU_BOOKE:
+mmubooke_dump_mmu(f, cpu_fprintf, env);
+break;
case POWERPC_MMU_BOOKE206:
mmubooke206_dump_mmu(f, cpu_fprintf, env);
break;
--
1.6.0.2
[Qemu-devel] [PATCH 8/8] target-ppc: Some support for dumping TLB_EMB TLBs
From: François Revol re...@free.fr
Add mmubooke_dump_mmu().
TODO: Add printing of individual flags.
Signed-off-by: François Revol re...@free.fr
[agraf: fix coding style]
Signed-off-by: Alexander Graf ag...@suse.de
---
target-ppc/helper.c | 50 ++
1 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index c610ce3..e97e496 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1466,6 +1466,53 @@ static const char *book3e_tsize_to_str[32] = {
1T, 2T
};
+static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
+ CPUPPCState *env)
+{
+ppcemb_tlb_t *entry;
+int i;
+
+if (kvm_enabled() !env-kvm_sw_tlb) {
+cpu_fprintf(f, Cannot access KVM TLB\n);
+return;
+}
+
+cpu_fprintf(f, \nTLB:\n);
+cpu_fprintf(f, Effective Physical Size PID Prot
+Attr\n);
+
+entry = env-tlb.tlbe[0];
+for (i = 0; i env-nb_tlb; i++, entry++) {
+target_phys_addr_t ea, pa;
+target_ulong mask;
+uint64_t size = (uint64_t)entry-size;
+char size_buf[20];
+
+/* Check valid flag */
+if (!(entry-prot PAGE_VALID)) {
+continue;
+}
+
+mask = ~(entry-size - 1);
+ea = entry-EPN mask;
+pa = entry-RPN mask;
+#if (TARGET_PHYS_ADDR_BITS = 36)
+/* Extend the physical address to 36 bits */
+pa |= (target_phys_addr_t)(entry-RPN 0xF) 32;
+#endif
+size /= 1024;
+if (size = 1024) {
+snprintf(size_buf, sizeof(size_buf), %3 PRId64 M, size / 1024);
+} else {
+snprintf(size_buf, sizeof(size_buf), %3 PRId64 k, size);
+}
+cpu_fprintf(f, 0x%016 PRIx64 0x%016 PRIx64 %s %-5u %08x %08x\n,
+(uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry-PID,
+entry-prot, entry-attr);
+}
+
+}
+
static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf,
CPUPPCState *env, int tlbn, int offset,
int tlbsize)
@@ -1561,6 +1608,9 @@ static void mmubooks_dump_mmu(FILE *f, fprintf_function
cpu_fprintf,
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
{
switch (env-mmu_model) {
+case POWERPC_MMU_BOOKE:
+mmubooke_dump_mmu(f, cpu_fprintf, env);
+break;
case POWERPC_MMU_BOOKE206:
mmubooke206_dump_mmu(f, cpu_fprintf, env);
break;
--
1.6.0.2
