Re: [Qemu-devel] [PATCH RFC] target-arm:Add a dynamic XML-description of the cp-registers to GDB

2018-01-22 Thread Peter Maydell
On 16 January 2018 at 09:40, Abdallah Bouassida
 wrote:
> [PATCH RFC] target-arm:Add a dynamic XML-description of the cp-registers to
> GDB
>
> This patch offers to GDB the ability to read/write all the coprocessor
> registers for ARM and ARM64 by generating dynamically an XML-description for
> these registers.

Thanks for this patch. This is definitely a feature we've been asked
for in the past (eg https://bugs.launchpad.net/qemu/+bug/741115).

> - gdbstub.c :
> *Extend the get_feature_xml() to handle the dynamic XML generation
> for
>architectures that support this (gdb_coprocessor_dynnamic_xml ==
> true)
> *Extend the gdb_write_register() and gdb_read_register() to handle
> the
>   write and the read of these registers.
> - include/qom/cpu.h:
> *Add a new structure "XMLDynamicDescription".
> *Declare the new variables and function pointers.
> - target/arm/cpu.c:
> *Initialize the new variables and function pointers for ARM.
> - target/arm/cpu.h:
> *Declare the new read, write and XML dynamic generation functions.
> *Declare the write_raw_cp_reg() as I have changed it to non static.
> - target/arm/gdbstub.c:
> *Define the new functions for ARM:
> arm_generate_xml(): is called for each register of the hashtable
> cp_regs
>  to generate the right XML "" line for it.
> arm_get_feature_xml_dynamically(): generate the XML dynamically.
> arm_cpu_gdb_read_cpregister(): To read the coprocessor
> registers.
> arm_cpu_gdb_write_cpregister(): To write the coprocessor
> registers.

You don't need to put this kind of gcc-style "what got changed at a very
fine level of detail" into the commit message -- people can look at the patch or
the diffstat for that. The commit message is for overview of what is being
changed and why.

> This patch is tagged as [RFC] because I need help to review the following
> points:
> *I only take the registers that (!(ri->type & (ARM_CP_NO_RAW|ARM_CP_ALIAS)))
> So, am I covering all the Coprocessor registers with that?

More the other way around -- you may be including some things you
should not...

> *For the ARM64, should I differentiate the registers that have two views (32
> and 64)
> Maybe by adding in the XML description a "32" tag for the registers name for
> the
> 32bit view and a "64" for the 64bit view.
> *How to properly handle the secure and the non secure views?

I think it might be useful to approach it from the other end -- what
are we trying to achieve?

For 32 vs 64 bit, it depends on what interface we're showing to the
debugger. If we're saying "this is a 64 bit CPU" then we should just
present the 64-bit sysregs, in the same way we only present the 64-bit
GPRs. If a 32-bit CPU, present the coprocessor regs only. (It's not
currently possible to have gdb switch between 32 and 64 bit views
as a 64-bit CPU changes from aarch32 to aarch64, though upstream gdb
are working on it.)

For secure vs non-secure, follow how the architecture does it:
 * for a 64-bit CPU, there are no banked sysregs like this, so you
   just expose 1 register
 * for a 32-bit CPU, maybe banked registers should be exposed as 2 registers

...but this depends on what you're trying to do, and whether there's
existing practice in for instance how JTAG debugging presents these
sysregs to gdb.

I'm pretty hesitant about allowing the user to modify system registers
in the debugger, that is unlikely to work in quite a lot of cases.
I'd rather we just made these registers all readonly.

What does the UI in gdb look like? What gdb commands display
the list of and values of system registers now? (Are there any
commands that used to be useful and are now swamped by lists of
hundreds of system registers?)

I've made some more comments on the code below.

> Signed-off-by: Abdallah Bouassida 
> ---
>  gdbstub.c| 18 +++
>  include/qom/cpu.h| 19 +++
>  target/arm/cpu.c |  5 +++
>  target/arm/cpu.h |  6 +++-
>  target/arm/gdbstub.c | 90
> 
>  target/arm/helper.c  |  3 +-
>  6 files changed, 138 insertions(+), 3 deletions(-)
>
> diff --git a/gdbstub.c b/gdbstub.c
> index f1d5148..b0124c8 100644
> --- a/gdbstub.c
> +++ b/gdbstub.c
> @@ -670,10 +670,20 @@ static const char *get_feature_xml(const char *p,
> const char **newp,
>  pstrcat(target_xml, sizeof(target_xml), r->xml);
>  pstrcat(target_xml, sizeof(target_xml), "\"/>");
>  }
> +if (cc->gdb_coprocessor_dynamic_xml) {
> +pstrcat(target_xml, sizeof(target_xml), " href=\"");
> +pstrcat(target_xml, sizeof(target_xml), \
> +"coprocessor_dynamic.xml");
> +pstrcat(target_xml, sizeof(target_xml), "\"/>");
> +}
>  pstrcat(target_xml, sizeof(target_xml), "");
>  }
>  ret

[Qemu-devel] [PATCH RFC] target-arm:Add a dynamic XML-description of the cp-registers to GDB

2018-01-16 Thread Abdallah Bouassida
[PATCH RFC] target-arm:Add a dynamic XML-description of the cp-registers 
to GDB


This patch offers to GDB the ability to read/write all the coprocessor
registers for ARM and ARM64 by generating dynamically an XML-description for
these registers.

- gdbstub.c :
        *Extend the get_feature_xml() to handle the dynamic XML 
generation for
           architectures that support this 
(gdb_coprocessor_dynnamic_xml == true)
        *Extend the gdb_write_register() and gdb_read_register() to 
handle the

  write and the read of these registers.
- include/qom/cpu.h:
        *Add a new structure "XMLDynamicDescription".
    *Declare the new variables and function pointers.
- target/arm/cpu.c:
    *Initialize the new variables and function pointers for ARM.
- target/arm/cpu.h:
        *Declare the new read, write and XML dynamic generation functions.
        *Declare the write_raw_cp_reg() as I have changed it to non static.
- target/arm/gdbstub.c:
        *Define the new functions for ARM:
            arm_generate_xml(): is called for each register of the 
hashtable cp_regs

                     to generate the right XML "" line for it.
            arm_get_feature_xml_dynamically(): generate the XML 
dynamically.
            arm_cpu_gdb_read_cpregister(): To read the coprocessor 
registers.
            arm_cpu_gdb_write_cpregister(): To write the coprocessor 
registers.


This patch is tagged as [RFC] because I need help to review the 
following points:

*I only take the registers that (!(ri->type & (ARM_CP_NO_RAW|ARM_CP_ALIAS)))
So, am I covering all the Coprocessor registers with that?
*For the ARM64, should I differentiate the registers that have two views 
(32 and 64)
Maybe by adding in the XML description a "32" tag for the registers name 
for the

32bit view and a "64" for the 64bit view.
*How to properly handle the secure and the non secure views?

Signed-off-by: Abdallah Bouassida 
---
 gdbstub.c    | 18 +++
 include/qom/cpu.h    | 19 +++
 target/arm/cpu.c |  5 +++
 target/arm/cpu.h |  6 +++-
 target/arm/gdbstub.c | 90 


 target/arm/helper.c  |  3 +-
 6 files changed, 138 insertions(+), 3 deletions(-)

diff --git a/gdbstub.c b/gdbstub.c
index f1d5148..b0124c8 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -670,10 +670,20 @@ static const char *get_feature_xml(const char *p, 
const char **newp,

 pstrcat(target_xml, sizeof(target_xml), r->xml);
 pstrcat(target_xml, sizeof(target_xml), "\"/>");
 }
+    if (cc->gdb_coprocessor_dynamic_xml) {
+    pstrcat(target_xml, sizeof(target_xml), "href=\"");

+    pstrcat(target_xml, sizeof(target_xml), \
+            "coprocessor_dynamic.xml");
+    pstrcat(target_xml, sizeof(target_xml), "\"/>");
+    }
 pstrcat(target_xml, sizeof(target_xml), "");
 }
 return target_xml;
 }
+    if (strncmp(p, "coprocessor_dynamic.xml", len) == 0) {
+    CPUState *cpu = first_cpu;
+        return cc->get_feature_xml_dynamically(cpu);
+    }
 for (i = 0; ; i++) {
 name = xml_builtin[i][0];
 if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
@@ -697,6 +707,10 @@ static int gdb_read_register(CPUState *cpu, uint8_t 
*mem_buf, int reg)

 return r->get_reg(env, mem_buf, reg - r->base_reg);
 }
 }
+
+    if (reg < cpu->gdb_num_regs + cc->gdb_num_cpregs) {
+    return cc->gdb_read_cpregister(cpu, mem_buf, reg - 
cpu->gdb_num_regs);

+    }
 return 0;
 }

@@ -715,6 +729,10 @@ static int gdb_write_register(CPUState *cpu, 
uint8_t *mem_buf, int reg)

 return r->set_reg(env, mem_buf, reg - r->base_reg);
 }
 }
+
+    if (reg < cpu->gdb_num_regs + cc->gdb_num_cpregs) {
+    return cc->gdb_write_cpregister(cpu, mem_buf, reg - 
cpu->gdb_num_regs);

+    }
 return 0;
 }

diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 93bd546..f40ee59 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -76,6 +76,19 @@ typedef void (*CPUUnassignedAccess)(CPUState *cpu, 
hwaddr addr,

 struct TranslationBlock;

 /**
+ * XMLDynamicDescription:
+ * @desc: Contains the XML descriptions.
+ * @num_cpregs: Number of the Coprocessor registers seen by GDB.
+ * @xml_cpregs_ordred_keys: Array that contains the corresponding Key of
+ * a given cpreg with the same order of the cpreg in the XML description.
+ */
+typedef struct XMLDynamicDescription {
+    char * desc;
+    int num_cpregs;
+    uint32_t *xml_cpregs_ordred_keys;
+} XMLDynamicDescription;
+
+/**
  * CPUClass:
  * @class_by_name: Callback to map -cpu command line model name to an
  * instantiatable CPU type.
@@ -196,6 +209,12 @@ typedef struct CPUClass {

 const struct VMStateDescription *vmsd;
 const char *gdb_core_xml_file;
+    bool gdb_coprocessor_dynamic_xml;
+    XMLDynamicDescription dyn_xml;
+    int