This patch series corrects a number of errors in the decoding and implementation of various forms of the ARM VCVT instruction. The resulting qemu has been tested by execution of 100,000 random variants of these instruction patterns with register values cross-checked against the results given by Cortex-A8 hardware.
Thanks to Johan Bengtsson for posting the initial VCVT related patch which prompted me to do some more testing in this area. This is V2 of this patchset which addresses Nathan Froyd's suggestion that we should be doing all the bit-twiddling in softfloat rather than in the ARM specific files. The old patch 4/8 is now 4/10 and 5/10, and the old 5/8 is now 6/10 and 7/10; all other patches are unchanged. In patch 4/10 I've left the '_any_' in the function name to avoid a clash/dependency on the proposed 'rename _is_nan to _is_quiet_nan' patch. Peter Maydell (10): ARM: Fix decoding of VFP forms of VCVT between float and int/fixed ARM: Fix decoding of Neon forms of VCVT between float and fixed point ARM: Fix sense of to_integer bit in Neon VCVT float/int conversion softfloat: Add float*_is_any_nan() functions ARM: Return correct result for float-to-integer conversion of NaN softfloat: Add float*_maybe_silence_nan() functions ARM: Return correct result for single<->double conversion of NaN ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point softfloat: Add float/double to 16 bit integer conversion functions ARM: Implement VCVT to 16 bit integer using new softfloat routines fpu/softfloat-specialize.h | 38 ++++++++++++ fpu/softfloat.c | 136 ++++++++++++++++++++++++++++++++++++++++++++ fpu/softfloat.h | 16 +++++ target-arm/helper.c | 43 +++++++++++++- target-arm/translate.c | 35 +++++++---- 5 files changed, 251 insertions(+), 17 deletions(-)