Re: [Qemu-devel] [PATCH qemu v7 1/4] linux-headers: update to f1517df8701c

2018-02-10 Thread David Gibson
On Fri, Feb 09, 2018 at 06:55:00PM +1100, Alexey Kardashevskiy wrote:
> Update headers against f1517df8701c.
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f1517df8701c
> 
> Signed-off-by: Alexey Kardashevskiy 

Might be worth mentioning that a32295c612c57 is the specific kernel
commit you want to include here, but in any case

Reviewed-by: David Gibson 

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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[Qemu-devel] [PATCH qemu v7 1/4] linux-headers: update to f1517df8701c

2018-02-08 Thread Alexey Kardashevskiy
Update headers against f1517df8701c.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f1517df8701c

Signed-off-by: Alexey Kardashevskiy 
--

Pulled because of new VFIO_REGION_INFO_CAP_MSIX_MAPPABLE
---
 include/standard-headers/linux/input-event-codes.h |   1 +
 include/standard-headers/linux/input.h |  11 +
 include/standard-headers/linux/pci_regs.h  |  30 +-
 include/standard-headers/linux/virtio_balloon.h|   3 +-
 include/standard-headers/linux/virtio_net.h|  13 +
 linux-headers/asm-powerpc/unistd.h |   3 +
 linux-headers/asm-s390/unistd.h| 401 +
 linux-headers/linux/psci.h |   3 +
 linux-headers/linux/vfio.h |  72 
 9 files changed, 126 insertions(+), 411 deletions(-)

diff --git a/include/standard-headers/linux/input-event-codes.h 
b/include/standard-headers/linux/input-event-codes.h
index 79841b5..9e6a8ba 100644
--- a/include/standard-headers/linux/input-event-codes.h
+++ b/include/standard-headers/linux/input-event-codes.h
@@ -594,6 +594,7 @@
 #define BTN_DPAD_RIGHT 0x223
 
 #define KEY_ALS_TOGGLE 0x230   /* Ambient light sensor */
+#define KEY_ROTATE_LOCK_TOGGLE 0x231   /* Display rotation lock */
 
 #define KEY_BUTTONCONFIG   0x240   /* AL Button Configuration */
 #define KEY_TASKMANAGER0x241   /* AL Task/Project Manager */
diff --git a/include/standard-headers/linux/input.h 
b/include/standard-headers/linux/input.h
index bc3e6d3..c0bd1ba 100644
--- a/include/standard-headers/linux/input.h
+++ b/include/standard-headers/linux/input.h
@@ -18,10 +18,21 @@
 
 /*
  * The event structure itself
+ * Note that __USE_TIME_BITS64 is defined by libc based on
+ * application's request to use 64 bit time_t.
  */
 
 struct input_event {
+#if (__BITS_PER_LONG != 32 || !defined(__USE_TIME_BITS64)) && 
!defined(__KERNEL)
struct timeval time;
+#define input_event_sec time.tv_sec
+#define input_event_usec time.tv_usec
+#else
+   __kernel_ulong_t __sec;
+   __kernel_ulong_t __usec;
+#define input_event_sec  __sec
+#define input_event_usec __usec
+#endif
uint16_t type;
uint16_t code;
int32_t value;
diff --git a/include/standard-headers/linux/pci_regs.h 
b/include/standard-headers/linux/pci_regs.h
index 70c2b2a..0c79eac 100644
--- a/include/standard-headers/linux/pci_regs.h
+++ b/include/standard-headers/linux/pci_regs.h
@@ -622,15 +622,19 @@
  * safely.
  */
 #define PCI_EXP_DEVCAP236  /* Device Capabilities 2 */
+#define  PCI_EXP_DEVCAP2_COMP_TMOUT_DIS0x0010 /* Completion 
Timeout Disable supported */
 #define  PCI_EXP_DEVCAP2_ARI   0x0020 /* Alternative Routing-ID */
 #define  PCI_EXP_DEVCAP2_ATOMIC_ROUTE  0x0040 /* Atomic Op routing */
-#define PCI_EXP_DEVCAP2_ATOMIC_COMP64  0x0100 /* Atomic 64-bit compare */
+#define  PCI_EXP_DEVCAP2_ATOMIC_COMP32 0x0080 /* 32b AtomicOp completion */
+#define  PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x0100 /* 64b AtomicOp completion */
+#define  PCI_EXP_DEVCAP2_ATOMIC_COMP1280x0200 /* 128b AtomicOp 
completion */
 #define  PCI_EXP_DEVCAP2_LTR   0x0800 /* Latency tolerance 
reporting */
 #define  PCI_EXP_DEVCAP2_OBFF_MASK 0x000c /* OBFF support mechanism */
 #define  PCI_EXP_DEVCAP2_OBFF_MSG  0x0004 /* New message signaling */
 #define  PCI_EXP_DEVCAP2_OBFF_WAKE 0x0008 /* Re-use WAKE# for OBFF */
 #define PCI_EXP_DEVCTL240  /* Device Control 2 */
 #define  PCI_EXP_DEVCTL2_COMP_TIMEOUT  0x000f  /* Completion Timeout Value */
+#define  PCI_EXP_DEVCTL2_COMP_TMOUT_DIS0x0010  /* Completion Timeout 
Disable */
 #define  PCI_EXP_DEVCTL2_ARI   0x0020  /* Alternative Routing-ID */
 #define PCI_EXP_DEVCTL2_ATOMIC_REQ 0x0040  /* Set Atomic requests */
 #define PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK 0x0080 /* Block atomic egress */
@@ -966,26 +970,28 @@
 
 /* Downstream Port Containment */
 #define PCI_EXP_DPC_CAP4   /* DPC Capability */
-#define PCI_EXP_DPC_IRQ0x1f/* DPC Interrupt 
Message Number */
-#define  PCI_EXP_DPC_CAP_RP_EXT0x20/* Root Port Extensions 
for DPC */
-#define  PCI_EXP_DPC_CAP_POISONED_TLP  0x40/* Poisoned TLP Egress Blocking 
Supported */
-#define  PCI_EXP_DPC_CAP_SW_TRIGGER0x80/* Software Triggering 
Supported */
-#define  PCI_EXP_DPC_RP_PIO_LOG_SIZE   0xF00   /* RP PIO log size */
+#define PCI_EXP_DPC_IRQ0x001F  /* Interrupt Message 
Number */
+#define  PCI_EXP_DPC_CAP_RP_EXT0x0020  /* Root Port Extensions 
*/
+#define  PCI_EXP_DPC_CAP_POISONED_TLP  0x0040  /* Poisoned TLP Egress Blocking 
Supported */
+#define  PCI_EXP_DPC_CAP_SW_TRIGGER0x0080  /* Software Triggering 
Supported */
+#define  PCI_EXP_DPC_RP_PIO_LOG_SIZE   0x0F00  /* RP PIO Log Size */
 #define