Re: [Qemu-devel] [PATCH v2 0/3] Enable MTTCG on PPC64
On 04/07/2017 11:51 PM, David Gibson wrote: On Fri, Apr 07, 2017 at 11:37:49AM +0530, Nikunj A Dadhania wrote: The series enables Multi-Threaded TCG on PPC64 Patch 01: Use atomic_cmpxchg in store conditional 02: Handle first write to page during atomic operation 03: Generate memory barriers for sync/isync and load/store conditional Patches are based on ppc-for-2.10 Applied to ppc-for-2.10. Anyone object to that for 2/3, which isn't within ppc code? Please go ahead. If there was another queue it might have gone in, it would probably be tcg-next, and I don't have anything else pending at the moment. r~
Re: [Qemu-devel] [PATCH v2 0/3] Enable MTTCG on PPC64
On Fri, Apr 07, 2017 at 11:37:49AM +0530, Nikunj A Dadhania wrote: > The series enables Multi-Threaded TCG on PPC64 > > Patch 01: Use atomic_cmpxchg in store conditional > 02: Handle first write to page during atomic operation > 03: Generate memory barriers for sync/isync and load/store conditional > > Patches are based on ppc-for-2.10 Applied to ppc-for-2.10. Anyone object to that for 2/3, which isn't within ppc code? -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson signature.asc Description: PGP signature
[Qemu-devel] [PATCH v2 0/3] Enable MTTCG on PPC64
The series enables Multi-Threaded TCG on PPC64 Patch 01: Use atomic_cmpxchg in store conditional 02: Handle first write to page during atomic operation 03: Generate memory barriers for sync/isync and load/store conditional Patches are based on ppc-for-2.10 Changelog: v1: * Rewrote store_conditional as suggested by Richard Tested using following: ./ppc64-softmmu/qemu-system-ppc64 -cpu POWER8 -vga none -nographic -machine pseries,usb=off -m 2G -smp 8,cores=8,threads=1 -accel tcg,thread=multi f23.img Todo: * Implement lqarx and stqcx * Enable other machine types and PPC32. * More testing for corner cases. Nikunj A Dadhania (3): target/ppc: Emulate LL/SC using cmpxchg helpers cputlb: handle first atomic write to the page target/ppc: Generate fence operations cputlb.c | 8 +++- target/ppc/translate.c | 37 +++-- 2 files changed, 38 insertions(+), 7 deletions(-) -- 2.9.3
