Re: [Qemu-devel] [PATCH v2 01/11] target-ppc: Convert ppc cpu savevm to VMStateDescription
On 07/19/2013 05:32 AM, Anthony Liguori wrote: From: Alexey Kardashevskiy a...@ozlabs.ru The savevm code for the powerpc cpu emulation is currently based around the old register_savevm() rather than register_vmstate() method. It's also rather broken, missing some important state on some CPU models. This patch completely rewrites the savevm for target-ppc, using the new VMStateDescription approach. Exactly what needs to be saved in what configurations has been more carefully examined, too. This introduces a new version (5) of the cpu save format. The old load function is retained to support version 4 images. Signed-off-by: David Gibson da...@gibson.dropbear.id.au [aik: ppc cpu savevm convertion fixed to use PowerPCCPU instead of CPUPPCState] Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- target-ppc/cpu-qom.h| 4 + target-ppc/cpu.h| 8 +- target-ppc/machine.c| 531 target-ppc/translate_init.c | 2 + 4 files changed, 452 insertions(+), 93 deletions(-) diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 7132599..c660e3c 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -106,4 +106,8 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); +#ifndef CONFIG_USER_ONLY +extern const struct VMStateDescription vmstate_ppc_cpu; +#endif + #endif diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7a7b1bf..454ea13 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -948,7 +948,7 @@ struct CPUPPCState { #if defined(TARGET_PPC64) /* PowerPC 64 SLB area */ ppc_slb_t slb[64]; -int slb_nr; +int32_t slb_nr; #endif /* segment registers */ hwaddr htab_base; @@ -957,11 +957,11 @@ struct CPUPPCState { /* externally stored hash table */ uint8_t *external_htab; /* BATs */ -int nb_BATs; +uint32_t nb_BATs; target_ulong DBAT[2][8]; target_ulong IBAT[2][8]; /* PowerPC TLB registers (for 4xx, e500 and 60x software driven TLBs) */ -int nb_tlb; /* Total number of TLB */ +int32_t nb_tlb; /* Total number of TLB */ int tlb_per_way; /* Speed-up helper: used to avoid divisions at run time */ int nb_ways; /* Number of ways in the TLB set */ int last_way;/* Last used way used to allocate TLB in a LRU way */ @@ -1176,8 +1176,6 @@ static inline CPUPPCState *cpu_init(const char *cpu_model) #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list -#define CPU_SAVE_VERSION 4 - /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _user #define MMU_MODE1_SUFFIX _kernel diff --git a/target-ppc/machine.c b/target-ppc/machine.c index 2d10adb..12e1512 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -1,96 +1,12 @@ #include hw/hw.h #include hw/boards.h #include sysemu/kvm.h +#include helper_regs.h -void cpu_save(QEMUFile *f, void *opaque) +static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) { -CPUPPCState *env = (CPUPPCState *)opaque; -unsigned int i, j; -uint32_t fpscr; -target_ulong xer; - -for (i = 0; i 32; i++) -qemu_put_betls(f, env-gpr[i]); -#if !defined(TARGET_PPC64) -for (i = 0; i 32; i++) -qemu_put_betls(f, env-gprh[i]); -#endif -qemu_put_betls(f, env-lr); -qemu_put_betls(f, env-ctr); -for (i = 0; i 8; i++) -qemu_put_be32s(f, env-crf[i]); -xer = cpu_read_xer(env); -qemu_put_betls(f, xer); -qemu_put_betls(f, env-reserve_addr); -qemu_put_betls(f, env-msr); -for (i = 0; i 4; i++) -qemu_put_betls(f, env-tgpr[i]); -for (i = 0; i 32; i++) { -union { -float64 d; -uint64_t l; -} u; -u.d = env-fpr[i]; -qemu_put_be64(f, u.l); -} -fpscr = env-fpscr; -qemu_put_be32s(f, fpscr); -qemu_put_sbe32s(f, env-access_type); -#if defined(TARGET_PPC64) -qemu_put_betls(f, env-spr[SPR_ASR]); -qemu_put_sbe32s(f, env-slb_nr); -#endif -qemu_put_betls(f, env-spr[SPR_SDR1]); -for (i = 0; i 32; i++) -qemu_put_betls(f, env-sr[i]); -for (i = 0; i 2; i++) -for (j = 0; j 8; j++) -qemu_put_betls(f, env-DBAT[i][j]); -for (i = 0; i 2; i++) -for (j = 0; j 8; j++) -qemu_put_betls(f, env-IBAT[i][j]); -qemu_put_sbe32s(f, env-nb_tlb); -qemu_put_sbe32s(f, env-tlb_per_way); -qemu_put_sbe32s(f, env-nb_ways); -qemu_put_sbe32s(f, env-last_way); -qemu_put_sbe32s(f, env-id_tlbs); -qemu_put_sbe32s(f, env-nb_pids); -if (env-tlb.tlb6) { -
Re: [Qemu-devel] [PATCH v2 01/11] target-ppc: Convert ppc cpu savevm to VMStateDescription
Am 24.07.2013 10:16, schrieb Alexey Kardashevskiy: On 07/19/2013 05:32 AM, Anthony Liguori wrote: diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 79bfcd8..09ea944 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8449,6 +8449,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc-do_interrupt = ppc_cpu_do_interrupt; cc-dump_state = ppc_cpu_dump_state; cc-dump_statistics = ppc_cpu_dump_statistics; + +cpu_class_set_vmsd(cc, vmstate_ppc_cpu); } Does not apply on the current master from qemu.org, need this: diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index f97c0c7..f377b74 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8462,7 +8462,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc-get_phys_page_debug = ppc_cpu_get_phys_page_debug; #endif -cpu_class_set_vmsd(cc, vmstate_ppc_cpu); +dc-vmsd = vmstate_ppc_cpu; } static const TypeInfo ppc_cpu_type_info = { That would break ppc-linux-user. It needs to go into the #ifdef above, which obsoleted cpu_class_set_vmsd(). Andreas -- SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH v2 01/11] target-ppc: Convert ppc cpu savevm to VMStateDescription
From: Alexey Kardashevskiy a...@ozlabs.ru The savevm code for the powerpc cpu emulation is currently based around the old register_savevm() rather than register_vmstate() method. It's also rather broken, missing some important state on some CPU models. This patch completely rewrites the savevm for target-ppc, using the new VMStateDescription approach. Exactly what needs to be saved in what configurations has been more carefully examined, too. This introduces a new version (5) of the cpu save format. The old load function is retained to support version 4 images. Signed-off-by: David Gibson da...@gibson.dropbear.id.au [aik: ppc cpu savevm convertion fixed to use PowerPCCPU instead of CPUPPCState] Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- target-ppc/cpu-qom.h| 4 + target-ppc/cpu.h| 8 +- target-ppc/machine.c| 531 target-ppc/translate_init.c | 2 + 4 files changed, 452 insertions(+), 93 deletions(-) diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 7132599..c660e3c 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -106,4 +106,8 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); +#ifndef CONFIG_USER_ONLY +extern const struct VMStateDescription vmstate_ppc_cpu; +#endif + #endif diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 7a7b1bf..454ea13 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -948,7 +948,7 @@ struct CPUPPCState { #if defined(TARGET_PPC64) /* PowerPC 64 SLB area */ ppc_slb_t slb[64]; -int slb_nr; +int32_t slb_nr; #endif /* segment registers */ hwaddr htab_base; @@ -957,11 +957,11 @@ struct CPUPPCState { /* externally stored hash table */ uint8_t *external_htab; /* BATs */ -int nb_BATs; +uint32_t nb_BATs; target_ulong DBAT[2][8]; target_ulong IBAT[2][8]; /* PowerPC TLB registers (for 4xx, e500 and 60x software driven TLBs) */ -int nb_tlb; /* Total number of TLB */ +int32_t nb_tlb; /* Total number of TLB */ int tlb_per_way; /* Speed-up helper: used to avoid divisions at run time */ int nb_ways; /* Number of ways in the TLB set*/ int last_way;/* Last used way used to allocate TLB in a LRU way */ @@ -1176,8 +1176,6 @@ static inline CPUPPCState *cpu_init(const char *cpu_model) #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list -#define CPU_SAVE_VERSION 4 - /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _user #define MMU_MODE1_SUFFIX _kernel diff --git a/target-ppc/machine.c b/target-ppc/machine.c index 2d10adb..12e1512 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -1,96 +1,12 @@ #include hw/hw.h #include hw/boards.h #include sysemu/kvm.h +#include helper_regs.h -void cpu_save(QEMUFile *f, void *opaque) +static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) { -CPUPPCState *env = (CPUPPCState *)opaque; -unsigned int i, j; -uint32_t fpscr; -target_ulong xer; - -for (i = 0; i 32; i++) -qemu_put_betls(f, env-gpr[i]); -#if !defined(TARGET_PPC64) -for (i = 0; i 32; i++) -qemu_put_betls(f, env-gprh[i]); -#endif -qemu_put_betls(f, env-lr); -qemu_put_betls(f, env-ctr); -for (i = 0; i 8; i++) -qemu_put_be32s(f, env-crf[i]); -xer = cpu_read_xer(env); -qemu_put_betls(f, xer); -qemu_put_betls(f, env-reserve_addr); -qemu_put_betls(f, env-msr); -for (i = 0; i 4; i++) -qemu_put_betls(f, env-tgpr[i]); -for (i = 0; i 32; i++) { -union { -float64 d; -uint64_t l; -} u; -u.d = env-fpr[i]; -qemu_put_be64(f, u.l); -} -fpscr = env-fpscr; -qemu_put_be32s(f, fpscr); -qemu_put_sbe32s(f, env-access_type); -#if defined(TARGET_PPC64) -qemu_put_betls(f, env-spr[SPR_ASR]); -qemu_put_sbe32s(f, env-slb_nr); -#endif -qemu_put_betls(f, env-spr[SPR_SDR1]); -for (i = 0; i 32; i++) -qemu_put_betls(f, env-sr[i]); -for (i = 0; i 2; i++) -for (j = 0; j 8; j++) -qemu_put_betls(f, env-DBAT[i][j]); -for (i = 0; i 2; i++) -for (j = 0; j 8; j++) -qemu_put_betls(f, env-IBAT[i][j]); -qemu_put_sbe32s(f, env-nb_tlb); -qemu_put_sbe32s(f, env-tlb_per_way); -qemu_put_sbe32s(f, env-nb_ways); -qemu_put_sbe32s(f, env-last_way); -qemu_put_sbe32s(f, env-id_tlbs); -qemu_put_sbe32s(f, env-nb_pids); -if (env-tlb.tlb6) { -// XXX assumes 6xx -for (i = 0; i env-nb_tlb; i++) { -qemu_put_betls(f, env-tlb.tlb6[i].pte0); -qemu_put_betls(f, env-tlb.tlb6[i].pte1); -