Re: [Qemu-devel] [PATCH v2 02/14] target-arm: Move feature bit settings to CPU init fns
On 20 April 2012 15:43, Andreas Färber wrote:
> Am 14.04.2012 18:42, schrieb Peter Maydell:
>> static void pxa270c5_initfn(Object *obj)
>> {
>> ARMCPU *cpu = ARM_CPU(obj);
>> + set_feature(&cpu->env, ARM_FEATURE_V7);
>> + set_feature(&cpu->env, ARM_FEATURE_VFP4);
>> + set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
>> + set_feature(&cpu->env, ARM_FEATURE_NEON);
>> + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
>> + set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
>> + set_feature(&cpu->env, ARM_FEATURE_V7MP);
>> cpu->midr = ARM_CPUID_PXA270_C5;
>> }
>
> Beep! Glad I took the time to compare each model... :)
>
> Once this is fixed, Acked-by.
Oops. Fixed version:
static void pxa270c5_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
set_feature(&cpu->env, ARM_FEATURE_V5);
set_feature(&cpu->env, ARM_FEATURE_XSCALE);
set_feature(&cpu->env, ARM_FEATURE_IWMMXT);
cpu->midr = ARM_CPUID_PXA270_C5;
}
-- PMM
Re: [Qemu-devel] [PATCH v2 02/14] target-arm: Move feature bit settings to CPU init fns
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move the setting of the feature bits from cpu_reset_model_id()
> to each CPU's instance init function. This requires us to move
> the features field in CPUARMState so that it is not cleared
> on reset.
>
> Signed-off-by: Peter Maydell
> ---
[...]
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 3565472..958f5c5 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
[...]
> static void pxa270c0_initfn(Object *obj)
> {
> ARMCPU *cpu = ARM_CPU(obj);
> +set_feature(&cpu->env, ARM_FEATURE_V5);
> +set_feature(&cpu->env, ARM_FEATURE_XSCALE);
> +set_feature(&cpu->env, ARM_FEATURE_IWMMXT);
> cpu->midr = ARM_CPUID_PXA270_C0;
> }
>
> static void pxa270c5_initfn(Object *obj)
> {
> ARMCPU *cpu = ARM_CPU(obj);
> +set_feature(&cpu->env, ARM_FEATURE_V7);
> +set_feature(&cpu->env, ARM_FEATURE_VFP4);
> +set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
> +set_feature(&cpu->env, ARM_FEATURE_NEON);
> +set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> +set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
> +set_feature(&cpu->env, ARM_FEATURE_V7MP);
> cpu->midr = ARM_CPUID_PXA270_C5;
> }
Beep! Glad I took the time to compare each model... :)
Once this is fixed, Acked-by.
/-F
>
> static void arm_any_initfn(Object *obj)
> {
> ARMCPU *cpu = ARM_CPU(obj);
> +set_feature(&cpu->env, ARM_FEATURE_V7);
> +set_feature(&cpu->env, ARM_FEATURE_VFP4);
> +set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
> +set_feature(&cpu->env, ARM_FEATURE_NEON);
> +set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> +set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
> +set_feature(&cpu->env, ARM_FEATURE_V7MP);
> cpu->midr = ARM_CPUID_ANY;
> }
>
[...]
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index afcd68c..e495de6 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
[...]
> @@ -220,17 +163,13 @@ static void cpu_reset_model_id(CPUARMState *env,
> uint32_t id)
> case ARM_CPUID_PXA270_B1:
> case ARM_CPUID_PXA270_C0:
> case ARM_CPUID_PXA270_C5:
> -set_feature(env, ARM_FEATURE_V5);
> -set_feature(env, ARM_FEATURE_XSCALE);
> /* JTAG_ID is ((id << 28) | 0x09265013) */
> -set_feature(env, ARM_FEATURE_IWMMXT);
> env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
> env->cp15.c0_cachetype = 0xd172172;
> env->cp15.c1_sys = 0x0078;
> break;
> case ARM_CPUID_SA1100:
> case ARM_CPUID_SA1110:
> -set_feature(env, ARM_FEATURE_STRONGARM);
> env->cp15.c1_sys = 0x0070;
> break;
> default:
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCH v2 02/14] target-arm: Move feature bit settings to CPU init fns
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move the setting of the feature bits from cpu_reset_model_id()
> to each CPU's instance init function. This requires us to move
> the features field in CPUARMState so that it is not cleared
> on reset.
>
> Signed-off-by: Peter Maydell
> ---
> target-arm/cpu-qom.h |1 +
> target-arm/cpu.c | 136
> ++
> target-arm/cpu.h |6 +-
> target-arm/helper.c | 97 +---
> 4 files changed, 141 insertions(+), 99 deletions(-)
>
> diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
> index a4bcb31..7e2d4c9 100644
> --- a/target-arm/cpu-qom.h
> +++ b/target-arm/cpu-qom.h
> @@ -79,5 +79,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
>
> #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
>
> +void arm_cpu_realize(ARMCPU *cpu);
>
> #endif
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 3565472..958f5c5 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
[...]
> @@ -41,161 +46,292 @@ static void arm_cpu_initfn(Object *obj)
> cpu_exec_init(&cpu->env);
> }
>
> +void arm_cpu_realize(ARMCPU *cpu)
> +{
[...]
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index afcd68c..e495de6 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
[...]
> @@ -413,6 +317,7 @@ CPUARMState *cpu_arm_init(const char *cpu_model)
> cpu = ARM_CPU(object_new(cpu_model));
> env = &cpu->env;
> env->cpu_model_str = cpu_model;
> +arm_cpu_realize(cpu);
My idea behind suggesting realize for this on IRC was to prepare a
function that can be hooked up to klass->realize later, i.e. taking an
Object *obj and Error **errp, returning an int indicating success.
But since we'd (in order) remove, modify and drop these lines once
realize gets applied it doesn't really matter too much.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
[Qemu-devel] [PATCH v2 02/14] target-arm: Move feature bit settings to CPU init fns
Move the setting of the feature bits from cpu_reset_model_id()
to each CPU's instance init function. This requires us to move
the features field in CPUARMState so that it is not cleared
on reset.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c | 136 ++
target-arm/cpu.h |6 +-
target-arm/helper.c | 97 +---
4 files changed, 141 insertions(+), 99 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index a4bcb31..7e2d4c9 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -79,5 +79,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
#define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e))
+void arm_cpu_realize(ARMCPU *cpu);
#endif
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 3565472..958f5c5 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -34,6 +34,11 @@ static void arm_cpu_reset(CPUState *s)
cpu_state_reset(&cpu->env);
}
+static inline void set_feature(CPUARMState *env, int feature)
+{
+env->features |= 1u << feature;
+}
+
static void arm_cpu_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
@@ -41,161 +46,292 @@ static void arm_cpu_initfn(Object *obj)
cpu_exec_init(&cpu->env);
}
+void arm_cpu_realize(ARMCPU *cpu)
+{
+/* This function is called by cpu_arm_init() because it
+ * needs to do common actions based on feature bits, etc
+ * that have been set by the subclass init functions.
+ * When we have QOM realize support it should become
+ * a true realize function instead.
+ */
+CPUARMState *env = &cpu->env;
+/* Some features automatically imply others: */
+if (arm_feature(env, ARM_FEATURE_V7)) {
+set_feature(env, ARM_FEATURE_VAPA);
+set_feature(env, ARM_FEATURE_THUMB2);
+if (!arm_feature(env, ARM_FEATURE_M)) {
+set_feature(env, ARM_FEATURE_V6K);
+} else {
+set_feature(env, ARM_FEATURE_V6);
+}
+}
+if (arm_feature(env, ARM_FEATURE_V6K)) {
+set_feature(env, ARM_FEATURE_V6);
+set_feature(env, ARM_FEATURE_MVFR);
+}
+if (arm_feature(env, ARM_FEATURE_V6)) {
+set_feature(env, ARM_FEATURE_V5);
+if (!arm_feature(env, ARM_FEATURE_M)) {
+set_feature(env, ARM_FEATURE_AUXCR);
+}
+}
+if (arm_feature(env, ARM_FEATURE_V5)) {
+set_feature(env, ARM_FEATURE_V4T);
+}
+if (arm_feature(env, ARM_FEATURE_M)) {
+set_feature(env, ARM_FEATURE_THUMB_DIV);
+}
+if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
+set_feature(env, ARM_FEATURE_THUMB_DIV);
+}
+if (arm_feature(env, ARM_FEATURE_VFP4)) {
+set_feature(env, ARM_FEATURE_VFP3);
+}
+if (arm_feature(env, ARM_FEATURE_VFP3)) {
+set_feature(env, ARM_FEATURE_VFP);
+}
+}
+
/* CPU models */
static void arm926_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V5);
+set_feature(&cpu->env, ARM_FEATURE_VFP);
cpu->midr = ARM_CPUID_ARM926;
}
static void arm946_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V5);
+set_feature(&cpu->env, ARM_FEATURE_MPU);
cpu->midr = ARM_CPUID_ARM946;
}
static void arm1026_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V5);
+set_feature(&cpu->env, ARM_FEATURE_VFP);
+set_feature(&cpu->env, ARM_FEATURE_AUXCR);
cpu->midr = ARM_CPUID_ARM1026;
}
static void arm1136_r2_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V6);
+set_feature(&cpu->env, ARM_FEATURE_VFP);
cpu->midr = ARM_CPUID_ARM1136_R2;
}
static void arm1136_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V6K);
+set_feature(&cpu->env, ARM_FEATURE_V6);
+set_feature(&cpu->env, ARM_FEATURE_VFP);
cpu->midr = ARM_CPUID_ARM1136;
}
static void arm1176_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V6K);
+set_feature(&cpu->env, ARM_FEATURE_VFP);
+set_feature(&cpu->env, ARM_FEATURE_VAPA);
cpu->midr = ARM_CPUID_ARM1176;
}
static void arm11mpcore_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V6K);
+set_feature(&cpu->env, ARM_FEATURE_VFP);
+set_feature(&cpu->env, ARM_FEATURE_VAPA);
cpu->midr = ARM_CPUID_ARM11MPCORE;
}
static void cortex_m3_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V7);
+set_feature(&cpu->env, ARM_FEATURE_M);
cpu->midr = ARM_CPUID_CORTEXM3;
}
static void cortex_a8_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
+set_feature(&cpu->env, ARM_FEATURE_V7);
+set_feature(&cpu->env, ARM_FEATURE_VFP3);
+set_feature(&cpu->env, ARM_FEATURE
