Re: [Qemu-devel] [PATCH v2 09/16] hw/mips: Use object_initialize() on MIPSCPSState
On 07/05/19 11:34, Philippe Mathieu-Daudé wrote:
> Initialize the MIPSCPSState with object_initialize() instead of
> object_new(). This will allow us to add it as children of the
> machine container.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/mips/boston.c | 25 -
> hw/mips/mips_malta.c | 17 -
> 2 files changed, 20 insertions(+), 22 deletions(-)
>
> diff --git a/hw/mips/boston.c b/hw/mips/boston.c
> index a8b29f62f5b..cb3ea85fdc1 100644
> --- a/hw/mips/boston.c
> +++ b/hw/mips/boston.c
> @@ -49,7 +49,7 @@ typedef struct {
> SysBusDevice parent_obj;
>
> MachineState *mach;
> -MIPSCPSState *cps;
> +MIPSCPSState cps;
> SerialState *uart;
>
> CharBackend lcd_display;
> @@ -188,7 +188,7 @@ static uint64_t boston_platreg_read(void *opaque, hwaddr
> addr,
> case PLAT_DDR3_STATUS:
> return PLAT_DDR3_STATUS_LOCKED | PLAT_DDR3_STATUS_CALIBRATED;
> case PLAT_MMCM_DIV:
> -gic_freq = mips_gictimer_get_freq(s->cps->gic.gic_timer) / 100;
> +gic_freq = mips_gictimer_get_freq(s->cps.gic.gic_timer) / 100;
> val = gic_freq << PLAT_MMCM_DIV_INPUT_SHIFT;
> val |= 1 << PLAT_MMCM_DIV_MUL_SHIFT;
> val |= 1 << PLAT_MMCM_DIV_CLK0DIV_SHIFT;
> @@ -455,20 +455,19 @@ static void boston_mach_init(MachineState *machine)
>
> is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
>
> -s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
> -qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
> -
> -object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
> +object_initialize(>cps, sizeof(s->cps), TYPE_MIPS_CPS);
> +qdev_set_parent_bus(DEVICE(>cps), sysbus_get_default());
> +object_property_set_str(OBJECT(>cps), machine->cpu_type, "cpu-type",
> );
> -object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", );
> -object_property_set_bool(OBJECT(s->cps), true, "realized", );
> +object_property_set_int(OBJECT(>cps), smp_cpus, "num-vp", );
> +object_property_set_bool(OBJECT(>cps), true, "realized", );
>
> if (err != NULL) {
> error_report("%s", error_get_pretty(err));
> exit(1);
> }
>
> -sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
> +sysbus_mmio_map_overlap(SYS_BUS_DEVICE(>cps), 0, 0, 1);
>
> flash = g_new(MemoryRegion, 1);
> memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, );
> @@ -487,17 +486,17 @@ static void boston_mach_init(MachineState *machine)
> xilinx_pcie_init(sys_mem, 0,
> 0x1000, 32 * MiB,
> 0x4000, 1 * GiB,
> - get_cps_irq(s->cps, 2), false);
> + get_cps_irq(>cps, 2), false);
>
> xilinx_pcie_init(sys_mem, 1,
> 0x1200, 32 * MiB,
> 0x2000, 512 * MiB,
> - get_cps_irq(s->cps, 1), false);
> + get_cps_irq(>cps, 1), false);
>
> pcie2 = xilinx_pcie_init(sys_mem, 2,
> 0x1400, 32 * MiB,
> 0x1600, 1 * MiB,
> - get_cps_irq(s->cps, 0), true);
> + get_cps_irq(>cps, 0), true);
>
> platreg = g_new(MemoryRegion, 1);
> memory_region_init_io(platreg, NULL, _platreg_ops, s,
> @@ -505,7 +504,7 @@ static void boston_mach_init(MachineState *machine)
> memory_region_add_subregion_overlap(sys_mem, 0x17ffd000, platreg, 0);
>
> s->uart = serial_mm_init(sys_mem, 0x17ffe000, 2,
> - get_cps_irq(s->cps, 3), 1000,
> + get_cps_irq(>cps, 3), 1000,
> serial_hd(0), DEVICE_NATIVE_ENDIAN);
>
> lcd = g_new(MemoryRegion, 1);
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 439665ab45e..04f2117d71e 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -94,7 +94,7 @@ typedef struct {
> typedef struct {
> SysBusDevice parent_obj;
>
> -MIPSCPSState *cps;
> +MIPSCPSState cps;
> qemu_irq *i8259;
> } MaltaState;
>
> @@ -1151,20 +1151,19 @@ static void create_cps(MaltaState *s, const char
> *cpu_type,
> {
> Error *err = NULL;
>
> -s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
> -qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
> -
> -object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", );
> -object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", );
> -object_property_set_bool(OBJECT(s->cps), true, "realized", );
> +object_initialize(>cps, sizeof(s->cps), TYPE_MIPS_CPS);
> +qdev_set_parent_bus(DEVICE(>cps), sysbus_get_default());
> +object_property_set_str(OBJECT(>cps), cpu_type, "cpu-type", );
> +object_property_set_int(OBJECT(>cps), smp_cpus, "num-vp", );
> +
[Qemu-devel] [PATCH v2 09/16] hw/mips: Use object_initialize() on MIPSCPSState
Initialize the MIPSCPSState with object_initialize() instead of
object_new(). This will allow us to add it as children of the
machine container.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/boston.c | 25 -
hw/mips/mips_malta.c | 17 -
2 files changed, 20 insertions(+), 22 deletions(-)
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index a8b29f62f5b..cb3ea85fdc1 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -49,7 +49,7 @@ typedef struct {
SysBusDevice parent_obj;
MachineState *mach;
-MIPSCPSState *cps;
+MIPSCPSState cps;
SerialState *uart;
CharBackend lcd_display;
@@ -188,7 +188,7 @@ static uint64_t boston_platreg_read(void *opaque, hwaddr
addr,
case PLAT_DDR3_STATUS:
return PLAT_DDR3_STATUS_LOCKED | PLAT_DDR3_STATUS_CALIBRATED;
case PLAT_MMCM_DIV:
-gic_freq = mips_gictimer_get_freq(s->cps->gic.gic_timer) / 100;
+gic_freq = mips_gictimer_get_freq(s->cps.gic.gic_timer) / 100;
val = gic_freq << PLAT_MMCM_DIV_INPUT_SHIFT;
val |= 1 << PLAT_MMCM_DIV_MUL_SHIFT;
val |= 1 << PLAT_MMCM_DIV_CLK0DIV_SHIFT;
@@ -455,20 +455,19 @@ static void boston_mach_init(MachineState *machine)
is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
-s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
-qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
-
-object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
+object_initialize(>cps, sizeof(s->cps), TYPE_MIPS_CPS);
+qdev_set_parent_bus(DEVICE(>cps), sysbus_get_default());
+object_property_set_str(OBJECT(>cps), machine->cpu_type, "cpu-type",
);
-object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", );
-object_property_set_bool(OBJECT(s->cps), true, "realized", );
+object_property_set_int(OBJECT(>cps), smp_cpus, "num-vp", );
+object_property_set_bool(OBJECT(>cps), true, "realized", );
if (err != NULL) {
error_report("%s", error_get_pretty(err));
exit(1);
}
-sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
+sysbus_mmio_map_overlap(SYS_BUS_DEVICE(>cps), 0, 0, 1);
flash = g_new(MemoryRegion, 1);
memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, );
@@ -487,17 +486,17 @@ static void boston_mach_init(MachineState *machine)
xilinx_pcie_init(sys_mem, 0,
0x1000, 32 * MiB,
0x4000, 1 * GiB,
- get_cps_irq(s->cps, 2), false);
+ get_cps_irq(>cps, 2), false);
xilinx_pcie_init(sys_mem, 1,
0x1200, 32 * MiB,
0x2000, 512 * MiB,
- get_cps_irq(s->cps, 1), false);
+ get_cps_irq(>cps, 1), false);
pcie2 = xilinx_pcie_init(sys_mem, 2,
0x1400, 32 * MiB,
0x1600, 1 * MiB,
- get_cps_irq(s->cps, 0), true);
+ get_cps_irq(>cps, 0), true);
platreg = g_new(MemoryRegion, 1);
memory_region_init_io(platreg, NULL, _platreg_ops, s,
@@ -505,7 +504,7 @@ static void boston_mach_init(MachineState *machine)
memory_region_add_subregion_overlap(sys_mem, 0x17ffd000, platreg, 0);
s->uart = serial_mm_init(sys_mem, 0x17ffe000, 2,
- get_cps_irq(s->cps, 3), 1000,
+ get_cps_irq(>cps, 3), 1000,
serial_hd(0), DEVICE_NATIVE_ENDIAN);
lcd = g_new(MemoryRegion, 1);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 439665ab45e..04f2117d71e 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -94,7 +94,7 @@ typedef struct {
typedef struct {
SysBusDevice parent_obj;
-MIPSCPSState *cps;
+MIPSCPSState cps;
qemu_irq *i8259;
} MaltaState;
@@ -1151,20 +1151,19 @@ static void create_cps(MaltaState *s, const char
*cpu_type,
{
Error *err = NULL;
-s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
-qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
-
-object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", );
-object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", );
-object_property_set_bool(OBJECT(s->cps), true, "realized", );
+object_initialize(>cps, sizeof(s->cps), TYPE_MIPS_CPS);
+qdev_set_parent_bus(DEVICE(>cps), sysbus_get_default());
+object_property_set_str(OBJECT(>cps), cpu_type, "cpu-type", );
+object_property_set_int(OBJECT(>cps), smp_cpus, "num-vp", );
+object_property_set_bool(OBJECT(>cps), true, "realized", );
if (err != NULL) {
error_report("%s", error_get_pretty(err));
exit(1);
}
-sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1);
+sysbus_mmio_map_overlap(SYS_BUS_DEVICE(>cps), 0, 0, 1);
-
