Re: [Qemu-devel] [PATCH v2 1/4] exec: introduce tlb_init

[Alex Bennée]

Emilio G. Cota  writes:

> Paves the way for the addition of a per-TLB lock.
>
> Signed-off-by: Emilio G. Cota 

Reviewed-by: Alex Bennée 

> ---
>  include/exec/exec-all.h | 8 
>  accel/tcg/cputlb.c  | 4 
>  exec.c  | 1 +
>  3 files changed, 13 insertions(+)
>
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 5f78125582..815e5b1e83 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -99,6 +99,11 @@ void cpu_address_space_init(CPUState *cpu, int asidx,
>
>  #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
>  /* cputlb.c */
> +/**
> + * tlb_init - initialize a CPU's TLB
> + * @cpu: CPU whose TLB should be initialized
> + */
> +void tlb_init(CPUState *cpu);
>  /**
>   * tlb_flush_page:
>   * @cpu: CPU whose TLB should be flushed
> @@ -258,6 +263,9 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr,
>  void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
>   uintptr_t retaddr);
>  #else
> +static inline void tlb_init(CPUState *cpu)
> +{
> +}
>  static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
>  {
>  }
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index f4702ce91f..502eea2850 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -73,6 +73,10 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > 
> sizeof(run_on_cpu_data));
>  QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
>  #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)
>
> +void tlb_init(CPUState *cpu)
> +{
> +}
> +
>  /* flush_all_helper: run fn across all cpus
>   *
>   * If the wait flag is set then the src cpu's helper will be queued as
> diff --git a/exec.c b/exec.c
> index d0821e69aa..4fd831ef06 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -965,6 +965,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
>  tcg_target_initialized = true;
>  cc->tcg_initialize();
>  }
> +tlb_init(cpu);
>
>  #ifndef CONFIG_USER_ONLY
>  if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {


--
Alex Bennée

[Qemu-devel] [PATCH v2 1/4] exec: introduce tlb_init

[Emilio G. Cota]

Paves the way for the addition of a per-TLB lock.

Signed-off-by: Emilio G. Cota 
---
 include/exec/exec-all.h | 8 
 accel/tcg/cputlb.c  | 4 
 exec.c  | 1 +
 3 files changed, 13 insertions(+)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 5f78125582..815e5b1e83 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -99,6 +99,11 @@ void cpu_address_space_init(CPUState *cpu, int asidx,
 
 #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
 /* cputlb.c */
+/**
+ * tlb_init - initialize a CPU's TLB
+ * @cpu: CPU whose TLB should be initialized
+ */
+void tlb_init(CPUState *cpu);
 /**
  * tlb_flush_page:
  * @cpu: CPU whose TLB should be flushed
@@ -258,6 +263,9 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr,
 void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
  uintptr_t retaddr);
 #else
+static inline void tlb_init(CPUState *cpu)
+{
+}
 static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
 {
 }
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index f4702ce91f..502eea2850 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -73,6 +73,10 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > 
sizeof(run_on_cpu_data));
 QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
 #define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)
 
+void tlb_init(CPUState *cpu)
+{
+}
+
 /* flush_all_helper: run fn across all cpus
  *
  * If the wait flag is set then the src cpu's helper will be queued as
diff --git a/exec.c b/exec.c
index d0821e69aa..4fd831ef06 100644
--- a/exec.c
+++ b/exec.c
@@ -965,6 +965,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
 tcg_target_initialized = true;
 cc->tcg_initialize();
 }
+tlb_init(cpu);
 
 #ifndef CONFIG_USER_ONLY
 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
-- 
2.17.1