Signed-off-by: Aurelien Jarno
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/mem_helper.c | 47 --
target/s390x/translate.c | 21 +
4 files changed, 65 insertions(+), 6 deletions(-)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 3580c6e13d..bc6e97de1f 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -23,6 +23,7 @@ DEF_HELPER_4(ex, void, env, i32, i64, i64)
DEF_HELPER_FLAGS_4(stam, TCG_CALL_NO_WG, void, env, i32, i64, i32)
DEF_HELPER_FLAGS_4(lam, TCG_CALL_NO_WG, void, env, i32, i64, i32)
DEF_HELPER_4(mvcle, i32, env, i32, i64, i32)
+DEF_HELPER_4(mvclu, i32, env, i32, i64, i32)
DEF_HELPER_4(clcle, i32, env, i32, i64, i32)
DEF_HELPER_4(clclu, i32, env, i32, i64, i32)
DEF_HELPER_3(cegb, i64, env, s64, i32)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index c781a97a3a..e3b7b78834 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -582,6 +582,8 @@
C(0x0e00, MVCL,RR_a, Z, 0, 0, 0, 0, mvcl, 0)
/* MOVE LONG EXTENDED */
C(0xa800, MVCLE, RS_a, Z, 0, a2, 0, 0, mvcle, 0)
+/* MOVE LONG UNICODE */
+C(0xeb8e, MVCLU, RSY_a, E2, 0, a2, 0, 0, mvclu, 0)
/* MOVE NUMERICS */
C(0xd100, MVN, SS_a, Z, la1, a2, 0, 0, mvn, 0)
/* MOVE PAGE */
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 4857f7214e..3d97d250d7 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -606,7 +606,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t
a2, uint32_t r3)
static inline uint32_t do_mvcl(CPUS390XState *env,
uint64_t *dest, uint64_t *destlen,
uint64_t *src, uint64_t *srclen,
- uint8_t pad, uintptr_t ra)
+ uint16_t pad, int wordsize, uintptr_t ra)
{
uint64_t len = MIN(*srclen, *destlen);
uint32_t cc;
@@ -627,9 +627,22 @@ static inline uint32_t do_mvcl(CPUS390XState *env,
*destlen -= len;
/* Pad the remaining area */
-fast_memset(env, *dest, pad, *destlen, ra);
-*dest += *destlen;
-*destlen = 0;
+if (wordsize == 1) {
+fast_memset(env, *dest, pad, *destlen, ra);
+*dest += *destlen;
+*destlen = 0;
+} else {
+/* If remaining length is odd, pad with odd byte first. */
+if (*destlen & 1) {
+cpu_stb_data_ra(env, *dest, pad & 0xff, ra);
+*dest += 1;
+*destlen -= 1;
+}
+/* The remaining length is even, pad using words. */
+for (; *destlen; *dest += 2, *destlen -= 2) {
+cpu_stw_data_ra(env, *dest, pad, ra);
+}
+}
return cc;
}
@@ -645,7 +658,7 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1,
uint32_t r2)
uint8_t pad = env->regs[r2 + 1] >> 24;
uint32_t cc;
-cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, ra);
+cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, 1, ra);
env->regs[r1 + 1] = deposit64(env->regs[r1 + 1], 0, 24, destlen);
env->regs[r2 + 1] = deposit64(env->regs[r2 + 1], 0, 24, srclen);
@@ -667,7 +680,29 @@ uint32_t HELPER(mvcle)(CPUS390XState *env, uint32_t r1,
uint64_t a2,
uint8_t pad = a2;
uint32_t cc;
-cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, ra);
+cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, 1, ra);
+
+set_length(env, r1 + 1, destlen);
+set_length(env, r3 + 1, srclen);
+set_address(env, r1, dest);
+set_address(env, r3, src);
+
+return cc;
+}
+
+/* move long unicode */
+uint32_t HELPER(mvclu)(CPUS390XState *env, uint32_t r1, uint64_t a2,
+ uint32_t r3)
+{
+uintptr_t ra = GETPC();
+uint64_t destlen = get_length(env, r1 + 1);
+uint64_t dest = get_address(env, r1);
+uint64_t srclen = get_length(env, r3 + 1);
+uint64_t src = get_address(env, r3);
+uint16_t pad = a2;
+uint32_t cc;
+
+cc = do_mvcl(env, &dest, &destlen, &src, &srclen, pad, 2, ra);
set_length(env, r1 + 1, destlen);
set_length(env, r3 + 1, srclen);
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 892949a05f..b160a0cad7 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3043,6 +3043,27 @@ static ExitStatus op_mvcle(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_mvclu(DisasContext *s, DisasOps *o)
+{
+int r1 = get_field(s->fields, r1);
+int r3 = get_field(s->fields, r3);
+TCGv_i32 t1, t3;
+
+/* r1 and r3 must be even. */
+if (r1 & 1 || r3 & 1) {
+gen_program_exception(s, PGM_SPECIFICATION);
+return EXIT_NORETURN;
+}
+
+t1 = tcg_const_i32(r1);
+t3 = tcg_const_i32(r3);
+gen_helper_mvclu(cc_op, cpu_env, t1, o->in2, t3);
+tcg_temp_free_i32(t1);
+tcg_temp_free_i32(t3);
+set_cc_static