Re: [Qemu-devel] [PATCH v2 3/5] target/mips: Rename MMI-related functions

2018-10-30 Thread Philippe Mathieu-Daudé 

On 30/10/18 12:36, Aleksandar Markovic wrote:

From: Aleksandar Markovic 

Rename MMI-related functions.

Signed-off-by: Aleksandar Markovic 


Reviewed-by: Philippe Mathieu-Daudé 


---
  target/mips/translate.c | 32 
  1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4b008d8..155331f 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24681,7 +24681,7 @@ static void decode_opc_special3_legacy(CPUMIPSState 
*env, DisasContext *ctx)
  }
  }
  
-static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)

+static void decode_mmi0(CPUMIPSState *env, DisasContext *ctx)
  {
  uint32_t opc = MASK_MMI0(ctx->opcode);
  
@@ -24720,7 +24720,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)

  }
  }
  
-static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)

+static void decode_mmi1(CPUMIPSState *env, DisasContext *ctx)
  {
  uint32_t opc = MASK_MMI1(ctx->opcode);
  
@@ -24752,7 +24752,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)

  }
  }
  
-static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)

+static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)
  {
  uint32_t opc = MASK_MMI2(ctx->opcode);
  
@@ -24788,7 +24788,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)

  }
  }
  
-static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)

+static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx)
  {
  uint32_t opc = MASK_MMI3(ctx->opcode);
  
@@ -24815,7 +24815,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)

  }
  }
  
-static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)

+static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
  {
  uint32_t opc = MASK_MMI(ctx->opcode);
  int rs = extract32(ctx->opcode, 21, 5);
@@ -24824,16 +24824,16 @@ static void decode_tx79_mmi(CPUMIPSState *env, 
DisasContext *ctx)
  
  switch (opc) {

  case MMI_OPC_CLASS_MMI0:
-decode_tx79_mmi0(env, ctx);
+decode_mmi0(env, ctx);
  break;
  case MMI_OPC_CLASS_MMI1:
-decode_tx79_mmi1(env, ctx);
+decode_mmi1(env, ctx);
  break;
  case MMI_OPC_CLASS_MMI2:
-decode_tx79_mmi2(env, ctx);
+decode_mmi2(env, ctx);
  break;
  case MMI_OPC_CLASS_MMI3:
-decode_tx79_mmi3(env, ctx);
+decode_mmi3(env, ctx);
  break;
  case MMI_OPC_MULT1:
  case MMI_OPC_MULTU1:
@@ -24873,12 +24873,12 @@ static void decode_tx79_mmi(CPUMIPSState *env, 
DisasContext *ctx)
  }
  }
  
-static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)

+static void decode_mmi_lq(CPUMIPSState *env, DisasContext *ctx)
  {
  generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_LQ */
  }
  
-static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)

+static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset)
  {
  generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_SQ */
  }
@@ -24904,7 +24904,7 @@ static void gen_tx79_sq(DisasContext *ctx, int base, 
int rt, int offset)
   * In user mode, QEMU must verify the upper and lower 11 bits to distinguish
   * between SQ and RDHWR, as the Linux kernel does.
   */
-static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi_sq(CPUMIPSState *env, DisasContext *ctx)
  {
  int base = extract32(ctx->opcode, 21, 5);
  int rt = extract32(ctx->opcode, 16, 5);
@@ -24922,7 +24922,7 @@ static void decode_tx79_sq(CPUMIPSState *env, 
DisasContext *ctx)
  }
  #endif
  
-gen_tx79_sq(ctx, base, rt, offset);

+gen_mmi_sq(ctx, base, rt, offset);
  }
  
  static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)

@@ -26231,14 +26231,14 @@ static void decode_opc(CPUMIPSState *env, 
DisasContext *ctx)
  break;
  case OPC_SPECIAL2:
  if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
-decode_tx79_mmi(env, ctx);
+decode_mmi(env, ctx);
  } else {
  decode_opc_special2_legacy(env, ctx);
  }
  break;
  case OPC_SPECIAL3:
  if (ctx->insn_flags & INSN_R5900) {
-decode_tx79_sq(env, ctx);/* MMI_SQ */
+decode_mmi_sq(env, ctx);/* MMI_SQ */
  } else {
  decode_opc_special3(env, ctx);
  }
@@ -26902,7 +26902,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
  break;
  case OPC_MSA: /* OPC_MDMX */
  if (ctx->insn_flags & INSN_R5900) {
-decode_tx79_lq(env, ctx);/* MMI_LQ */
+decode_mmi_lq(env, ctx);/* MMI_LQ */
  } else {
  /* MDMX: Not implemented. */
  gen_msa(env, ctx);

Re: [Qemu-devel] [PATCH v2 3/5] target/mips: Rename MMI-related functions

2018-10-30 Thread Stefan Markovic 

On 30.10.18. 12:36, Aleksandar Markovic wrote:
> From: Aleksandar Markovic 
>
> Rename MMI-related functions.
>
> Signed-off-by: Aleksandar Markovic 
> ---
>   target/mips/translate.c | 32 
>   1 file changed, 16 insertions(+), 16 deletions(-)


Reviewed-by: Stefan Markovic 


> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 4b008d8..155331f 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -24681,7 +24681,7 @@ static void decode_opc_special3_legacy(CPUMIPSState 
> *env, DisasContext *ctx)
>   }
>   }
>   
> -static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi0(CPUMIPSState *env, DisasContext *ctx)
>   {
>   uint32_t opc = MASK_MMI0(ctx->opcode);
>   
> @@ -24720,7 +24720,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env, 
> DisasContext *ctx)
>   }
>   }
>   
> -static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi1(CPUMIPSState *env, DisasContext *ctx)
>   {
>   uint32_t opc = MASK_MMI1(ctx->opcode);
>   
> @@ -24752,7 +24752,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env, 
> DisasContext *ctx)
>   }
>   }
>   
> -static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)
>   {
>   uint32_t opc = MASK_MMI2(ctx->opcode);
>   
> @@ -24788,7 +24788,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env, 
> DisasContext *ctx)
>   }
>   }
>   
> -static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx)
>   {
>   uint32_t opc = MASK_MMI3(ctx->opcode);
>   
> @@ -24815,7 +24815,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env, 
> DisasContext *ctx)
>   }
>   }
>   
> -static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
>   {
>   uint32_t opc = MASK_MMI(ctx->opcode);
>   int rs = extract32(ctx->opcode, 21, 5);
> @@ -24824,16 +24824,16 @@ static void decode_tx79_mmi(CPUMIPSState *env, 
> DisasContext *ctx)
>   
>   switch (opc) {
>   case MMI_OPC_CLASS_MMI0:
> -decode_tx79_mmi0(env, ctx);
> +decode_mmi0(env, ctx);
>   break;
>   case MMI_OPC_CLASS_MMI1:
> -decode_tx79_mmi1(env, ctx);
> +decode_mmi1(env, ctx);
>   break;
>   case MMI_OPC_CLASS_MMI2:
> -decode_tx79_mmi2(env, ctx);
> +decode_mmi2(env, ctx);
>   break;
>   case MMI_OPC_CLASS_MMI3:
> -decode_tx79_mmi3(env, ctx);
> +decode_mmi3(env, ctx);
>   break;
>   case MMI_OPC_MULT1:
>   case MMI_OPC_MULTU1:
> @@ -24873,12 +24873,12 @@ static void decode_tx79_mmi(CPUMIPSState *env, 
> DisasContext *ctx)
>   }
>   }
>   
> -static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi_lq(CPUMIPSState *env, DisasContext *ctx)
>   {
>   generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_LQ */
>   }
>   
> -static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
> +static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset)
>   {
>   generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_SQ */
>   }
> @@ -24904,7 +24904,7 @@ static void gen_tx79_sq(DisasContext *ctx, int base, 
> int rt, int offset)
>* In user mode, QEMU must verify the upper and lower 11 bits to distinguish
>* between SQ and RDHWR, as the Linux kernel does.
>*/
> -static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
> +static void decode_mmi_sq(CPUMIPSState *env, DisasContext *ctx)
>   {
>   int base = extract32(ctx->opcode, 21, 5);
>   int rt = extract32(ctx->opcode, 16, 5);
> @@ -24922,7 +24922,7 @@ static void decode_tx79_sq(CPUMIPSState *env, 
> DisasContext *ctx)
>   }
>   #endif
>   
> -gen_tx79_sq(ctx, base, rt, offset);
> +gen_mmi_sq(ctx, base, rt, offset);
>   }
>   
>   static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
> @@ -26231,14 +26231,14 @@ static void decode_opc(CPUMIPSState *env, 
> DisasContext *ctx)
>   break;
>   case OPC_SPECIAL2:
>   if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
> -decode_tx79_mmi(env, ctx);
> +decode_mmi(env, ctx);
>   } else {
>   decode_opc_special2_legacy(env, ctx);
>   }
>   break;
>   case OPC_SPECIAL3:
>   if (ctx->insn_flags & INSN_R5900) {
> -decode_tx79_sq(env, ctx);/* MMI_SQ */
> +decode_mmi_sq(env, ctx);/* MMI_SQ */
>   } else {
>   decode_opc_special3(env, ctx);
>   }
> @@ -26902,7 +26902,7 @@ static void decode_opc(CPUMIPSState *env, 
> DisasContext *ctx)
>   break;
>   case OPC_MSA: /* OPC_MDMX */
>   if (ctx->insn_flags & INSN_R5900) {
> -

[Qemu-devel] [PATCH v2 3/5] target/mips: Rename MMI-related functions

2018-10-30 Thread Aleksandar Markovic 
From: Aleksandar Markovic 

Rename MMI-related functions.

Signed-off-by: Aleksandar Markovic 
---
 target/mips/translate.c | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4b008d8..155331f 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24681,7 +24681,7 @@ static void decode_opc_special3_legacy(CPUMIPSState 
*env, DisasContext *ctx)
 }
 }
 
-static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi0(CPUMIPSState *env, DisasContext *ctx)
 {
 uint32_t opc = MASK_MMI0(ctx->opcode);
 
@@ -24720,7 +24720,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env, 
DisasContext *ctx)
 }
 }
 
-static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi1(CPUMIPSState *env, DisasContext *ctx)
 {
 uint32_t opc = MASK_MMI1(ctx->opcode);
 
@@ -24752,7 +24752,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env, 
DisasContext *ctx)
 }
 }
 
-static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)
 {
 uint32_t opc = MASK_MMI2(ctx->opcode);
 
@@ -24788,7 +24788,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env, 
DisasContext *ctx)
 }
 }
 
-static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx)
 {
 uint32_t opc = MASK_MMI3(ctx->opcode);
 
@@ -24815,7 +24815,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env, 
DisasContext *ctx)
 }
 }
 
-static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
 {
 uint32_t opc = MASK_MMI(ctx->opcode);
 int rs = extract32(ctx->opcode, 21, 5);
@@ -24824,16 +24824,16 @@ static void decode_tx79_mmi(CPUMIPSState *env, 
DisasContext *ctx)
 
 switch (opc) {
 case MMI_OPC_CLASS_MMI0:
-decode_tx79_mmi0(env, ctx);
+decode_mmi0(env, ctx);
 break;
 case MMI_OPC_CLASS_MMI1:
-decode_tx79_mmi1(env, ctx);
+decode_mmi1(env, ctx);
 break;
 case MMI_OPC_CLASS_MMI2:
-decode_tx79_mmi2(env, ctx);
+decode_mmi2(env, ctx);
 break;
 case MMI_OPC_CLASS_MMI3:
-decode_tx79_mmi3(env, ctx);
+decode_mmi3(env, ctx);
 break;
 case MMI_OPC_MULT1:
 case MMI_OPC_MULTU1:
@@ -24873,12 +24873,12 @@ static void decode_tx79_mmi(CPUMIPSState *env, 
DisasContext *ctx)
 }
 }
 
-static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi_lq(CPUMIPSState *env, DisasContext *ctx)
 {
 generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_LQ */
 }
 
-static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
+static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset)
 {
 generate_exception_end(ctx, EXCP_RI);/* TODO: MMI_SQ */
 }
@@ -24904,7 +24904,7 @@ static void gen_tx79_sq(DisasContext *ctx, int base, 
int rt, int offset)
  * In user mode, QEMU must verify the upper and lower 11 bits to distinguish
  * between SQ and RDHWR, as the Linux kernel does.
  */
-static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
+static void decode_mmi_sq(CPUMIPSState *env, DisasContext *ctx)
 {
 int base = extract32(ctx->opcode, 21, 5);
 int rt = extract32(ctx->opcode, 16, 5);
@@ -24922,7 +24922,7 @@ static void decode_tx79_sq(CPUMIPSState *env, 
DisasContext *ctx)
 }
 #endif
 
-gen_tx79_sq(ctx, base, rt, offset);
+gen_mmi_sq(ctx, base, rt, offset);
 }
 
 static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
@@ -26231,14 +26231,14 @@ static void decode_opc(CPUMIPSState *env, 
DisasContext *ctx)
 break;
 case OPC_SPECIAL2:
 if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
-decode_tx79_mmi(env, ctx);
+decode_mmi(env, ctx);
 } else {
 decode_opc_special2_legacy(env, ctx);
 }
 break;
 case OPC_SPECIAL3:
 if (ctx->insn_flags & INSN_R5900) {
-decode_tx79_sq(env, ctx);/* MMI_SQ */
+decode_mmi_sq(env, ctx);/* MMI_SQ */
 } else {
 decode_opc_special3(env, ctx);
 }
@@ -26902,7 +26902,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
 break;
 case OPC_MSA: /* OPC_MDMX */
 if (ctx->insn_flags & INSN_R5900) {
-decode_tx79_lq(env, ctx);/* MMI_LQ */
+decode_mmi_lq(env, ctx);/* MMI_LQ */
 } else {
 /* MDMX: Not implemented. */
 gen_msa(env, ctx);
-- 
2.7.4