Re: [Qemu-devel] [PATCH v2 5/6] xilinx_zynq: add pl353

[vbalaji]

Hi,

I want to emulate PL35x SMC controller with Nand flash as a device. Though I
got the patch from the following link.

http://qemu.11.n7.nabble.com/Qemu-devel-PATCH-v1-0-7-QOMify-pflash-cfi0x-PL353-for-Xilinx-Zynq-td167995.html.

I dont know how to test the nand flash with the SMC controller. Please can
you guide me if it is possible.

Thanks in advance
Balaji.



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Re: [Qemu-devel] [PATCH v2 5/6] xilinx_zynq: add pl353

[Peter Maydell]

On 22 October 2012 08:19, Peter Crosthwaite
 wrote:
> +/* pl353 */
> +dev = qdev_create(NULL, "arm.pl35x");
> +/* FIXME: handle this somewhere central */
> +object_property_add_child(container_get(qdev_get_machine(), 
> "/unattached"),
> +  "pl353", OBJECT(dev), NULL);

Spoke briefly to Anthony on IRC about this and he said he didn't
think it was necessary (though it might have been in the past).

-- PMM

[Qemu-devel] [PATCH v2 5/6] xilinx_zynq: add pl353

[Peter Crosthwaite]

Add the pl353 memory controller with both NAND and parallel flashes
attached.

Signed-off-by: Peter Crosthwaite 
---
changed from v1:
fixed property names (see patch 3)

 hw/xilinx_zynq.c |   50 ++
 1 files changed, 42 insertions(+), 8 deletions(-)

diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index c55dafb..7261693 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -123,14 +123,48 @@ static void zynq_init(QEMUMachineInitArgs *args)
 vmstate_register_ram_global(ocm_ram);
 memory_region_add_subregion(address_space_mem, 0xFFFC, ocm_ram);
 
-DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0);
-
-/* AMD */
-pflash_cfi02_register(0xe200, NULL, "zynq.pflash", FLASH_SIZE,
-  dinfo ? dinfo->bdrv : NULL, FLASH_SECTOR_SIZE,
-  FLASH_SIZE/FLASH_SECTOR_SIZE, 1,
-  1, 0x0066, 0x0022, 0x, 0x, 0x0555, 0x2aa,
-  0);
+/* pl353 */
+dev = qdev_create(NULL, "arm.pl35x");
+/* FIXME: handle this somewhere central */
+object_property_add_child(container_get(qdev_get_machine(), "/unattached"),
+  "pl353", OBJECT(dev), NULL);
+qdev_prop_set_uint8(dev, "x", 3);
+{
+DriveInfo *dinfo = drive_get_next(IF_PFLASH);
+BlockDriverState *bs =  dinfo ? dinfo->bdrv : NULL;
+DeviceState *att_dev = qdev_create(NULL, "cfi.pflash02");
+Error *errp = NULL;
+
+if (bs && qdev_prop_set_drive(att_dev, "drive", bs)) {
+abort();
+}
+qdev_prop_set_uint32(att_dev, "num-blocks",
+ FLASH_SIZE/FLASH_SECTOR_SIZE);
+qdev_prop_set_uint32(att_dev, "sector-length", FLASH_SECTOR_SIZE);
+qdev_prop_set_uint8(att_dev, "width", 1);
+qdev_prop_set_uint8(att_dev, "mappings", 1);
+qdev_prop_set_uint8(att_dev, "big-endian", 0);
+qdev_prop_set_uint16(att_dev, "id0", 0x0066);
+qdev_prop_set_uint16(att_dev, "id1", 0x0022);
+qdev_prop_set_uint16(att_dev, "id2", 0x);
+qdev_prop_set_uint16(att_dev, "id3", 0x);
+qdev_prop_set_uint16(att_dev, "unlock-addr0", 0x0aaa);
+qdev_prop_set_uint16(att_dev, "unlock-addr1", 0x0555);
+qdev_prop_set_string(att_dev, "name", "pl353.pflash");
+qdev_init_nofail(att_dev);
+object_property_set_link(OBJECT(dev), OBJECT(att_dev), "dev0", &errp);
+assert_no_error(errp);
+
+dinfo = drive_get_next(IF_PFLASH);
+att_dev = nand_init(dinfo ? dinfo->bdrv : NULL, NAND_MFR_STMICRO, 
0xaa);
+object_property_set_link(OBJECT(dev), OBJECT(att_dev), "dev1", &errp);
+assert_no_error(errp);
+}
+qdev_init_nofail(dev);
+busdev = sysbus_from_qdev(dev);
+sysbus_mmio_map(busdev, 0, 0xe000e000);
+sysbus_mmio_map(busdev, 1, 0xe200);
+sysbus_mmio_map(busdev, 2, 0xe100);
 
 dev = qdev_create(NULL, "xilinx,zynq_slcr");
 qdev_init_nofail(dev);
-- 
1.7.0.4