Re: [Qemu-devel] [PATCH v3 02/20] arm: add Faraday a369 SoC platform support

2013-02-17 Thread Kuo-Jung Su
2013/2/8 Igor Mitsyanko 
>
>
> On 02/06/2013 01:45 PM, Kuo-Jung Su wrote:
>
> From: Kuo-Jung Su 
>
> The Faraday A369 EVB is a Faraday SoC platform evalution board used for
> Faraday IP functional verification based on the well-known ARM AMBA 2.0
> architecture.
>
> Signed-off-by: Kuo-Jung Su 
> ---
>  hw/arm/Makefile.objs |1 +
>  hw/arm/faraday_a369.c|  161 +
>  hw/arm/faraday_a369_keypad.c |  234 
> ++
>  hw/arm/faraday_a369_scu.c|  188 +
>  hw/arm/ftkbc010.h|   26 +
>  5 files changed, 610 insertions(+)
>  create mode 100644 hw/arm/faraday_a369.c
>  create mode 100644 hw/arm/faraday_a369_keypad.c
>  create mode 100644 hw/arm/faraday_a369_scu.c
>  create mode 100644 hw/arm/ftkbc010.h
>
> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> index 59d7023..02d1a7b 100644
> --- a/hw/arm/Makefile.objs
> +++ b/hw/arm/Makefile.objs
> @@ -34,3 +34,4 @@ obj-$(CONFIG_FDT) += ../device_tree.o
>
>  obj-y := $(addprefix ../,$(obj-y))
>  obj-y += faraday_a360.o faraday_a360_pmu.o
> +obj-y += faraday_a369.o faraday_a369_scu.o faraday_a369_keypad.o
> diff --git a/hw/arm/faraday_a369.c b/hw/arm/faraday_a369.c
> new file mode 100644
> index 000..e32dc7f
> --- /dev/null
> +++ b/hw/arm/faraday_a369.c
> @@ -0,0 +1,161 @@
> +/*
> + * Faraday A369 Evalution Board
> + *
> + * Copyright (c) 2012 Faraday Technology
> + * Written by Dante Su 
> + *
> + * This code is licensed under GNU GPL v2+.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "faraday.h"
> +
> +typedef FaradayMachStateA369State;
> +
> +/* Board init.  */
> +
> +static void
> +a369_device_init(A369State *s)
> +{
> +/* Serial (FTUART010 which is 16550A compatible) */
> +if (serial_hds[0]) {
> +serial_mm_init(s->as,
> +   0x92b0,
> +   2,
> +   NULL,
> +   18432000 / 16,
> +   serial_hds[0],
> +   DEVICE_LITTLE_ENDIAN);
> +}
> +if (serial_hds[1]) {
> +serial_mm_init(s->as,
> +   0x92c0,
> +   2,
> +   NULL,
> +   18432000 / 16,
> +   serial_hds[1],
> +   DEVICE_LITTLE_ENDIAN);
> +}
> +
> +/* ftscu010 */
> +s->scu = sysbus_create_simple("a369.scu", 0x9200, NULL);
> +
> +/* ftkbc010 */
> +sysbus_create_simple("a369.keypad", 0x92f0, NULL);
> +}
> +
> +static void
> +a369_board_init(QEMUMachineInitArgs *args)
> +{
> +DriveInfo *dinfo;
> +struct arm_boot_info *bi = NULL;
> +A369State *s = g_new(A369State, 1);
> +
> +s->as = get_system_memory();
> +s->ram = g_new(MemoryRegion, 1);
> +s->sram = g_new(MemoryRegion, 1);
> +
> +/* CPU */
> +if (!args->cpu_model) {
> +args->cpu_model = "fa626te";
> +}
> +
> +s->cpu = cpu_arm_init(args->cpu_model);
> +if (!s->cpu) {
> +args->cpu_model = "arm926";
> +s->cpu = cpu_arm_init(args->cpu_model);
> +if (!s->cpu) {
> +hw_error("a369: Unable to find CPU definition\n");
> +exit(1);
> +}
> +}
> +
> +s->ahb_slave4 = 0x0008; /* ROM: base=0x, size=256MB */
> +s->ahb_slave6 = 0x1009; /* RAM: base=0x1000, size=512MB */
>
>
> Does this register provide information on max allowable RAM size or amount of 
> RAM actually accessible in a system? I mean,
> should this register be modified accordingly if args->ram_size value is less 
> then 512MB?
>
>

Yes, the values to the registers define both the base address and max. size
to the corresponding salve devices.

Although these registers are all R/W, they should be treated as read-only to
the softwares.
Modifying the setting to slave devices would alter the system memory mapped
and might cause un-predictable issues.

P.S:
These registers are designed to be writable for Faraday internal test only.
Sometimes we'll have A36x mounted with a new external AHB daughter board
with built-in CPU and peripheral, and make A36X  as an expansion bus.

Only in such case, we'll update the AHB slave settings for FPGA test.

> +
> +/* A369 supports upto 512MB ram space */
> +if (args->ram_size > 0x2000) {
> +args->ram_size = 0x2000;
> +}
>
> +
> +/* Use parallel NOR flash for ROM emulation */
> +dinfo = drive_get_next(IF_PFLASH);
> +s->rom = pflash_cfi01_register(
> +0,  /* base address */
> +NULL,
> +"a369.rom",
> +6144,   /* 6 KB */
> +dinfo ? dinfo->bdrv : NULL,
>
>
> I think you should also consider a case when we're booting with bootstrap 
> code in R

Re: [Qemu-devel] [PATCH v3 02/20] arm: add Faraday a369 SoC platform support

2013-02-07 Thread Igor Mitsyanko
On 02/06/2013 01:45 PM, Kuo-Jung Su wrote:

From: Kuo-Jung Su  

The Faraday A369 EVB is a Faraday SoC platform evalution board used for
Faraday IP functional verification based on the well-known ARM AMBA 2.0
architecture.

Signed-off-by: Kuo-Jung Su  
---
 hw/arm/Makefile.objs |1 +
 hw/arm/faraday_a369.c|  161 +
 hw/arm/faraday_a369_keypad.c |  234 ++
 hw/arm/faraday_a369_scu.c|  188 +
 hw/arm/ftkbc010.h|   26 +
 5 files changed, 610 insertions(+)
 create mode 100644 hw/arm/faraday_a369.c
 create mode 100644 hw/arm/faraday_a369_keypad.c
 create mode 100644 hw/arm/faraday_a369_scu.c
 create mode 100644 hw/arm/ftkbc010.h

diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 59d7023..02d1a7b 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -34,3 +34,4 @@ obj-$(CONFIG_FDT) += ../device_tree.o

 obj-y := $(addprefix ../,$(obj-y))
 obj-y += faraday_a360.o faraday_a360_pmu.o
+obj-y += faraday_a369.o faraday_a369_scu.o faraday_a369_keypad.o
diff --git a/hw/arm/faraday_a369.c b/hw/arm/faraday_a369.c
new file mode 100644
index 000..e32dc7f
--- /dev/null
+++ b/hw/arm/faraday_a369.c
@@ -0,0 +1,161 @@
+/*
+ * Faraday A369 Evalution Board
+ *
+ * Copyright (c) 2012 Faraday Technology
+ * Written by Dante Su  
+ *
+ * This code is licensed under GNU GPL v2+.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "faraday.h"
+
+typedef FaradayMachStateA369State;
+
+/* Board init.  */
+
+static void
+a369_device_init(A369State *s)
+{
+/* Serial (FTUART010 which is 16550A compatible) */
+if (serial_hds[0]) {
+serial_mm_init(s->as,
+   0x92b0,
+   2,
+   NULL,
+   18432000 / 16,
+   serial_hds[0],
+   DEVICE_LITTLE_ENDIAN);
+}
+if (serial_hds[1]) {
+serial_mm_init(s->as,
+   0x92c0,
+   2,
+   NULL,
+   18432000 / 16,
+   serial_hds[1],
+   DEVICE_LITTLE_ENDIAN);
+}
+
+/* ftscu010 */
+s->scu = sysbus_create_simple("a369.scu", 0x9200, NULL);
+
+/* ftkbc010 */
+sysbus_create_simple("a369.keypad", 0x92f0, NULL);
+}
+
+static void
+a369_board_init(QEMUMachineInitArgs *args)
+{
+DriveInfo *dinfo;
+struct arm_boot_info *bi = NULL;
+A369State *s = g_new(A369State, 1);
+
+s->as = get_system_memory();
+s->ram = g_new(MemoryRegion, 1);
+s->sram = g_new(MemoryRegion, 1);
+
+/* CPU */
+if (!args->cpu_model) {
+args->cpu_model = "fa626te";
+}
+
+s->cpu = cpu_arm_init(args->cpu_model);
+if (!s->cpu) {
+args->cpu_model = "arm926";
+s->cpu = cpu_arm_init(args->cpu_model);
+if (!s->cpu) {
+hw_error("a369: Unable to find CPU definition\n");
+exit(1);
+}
+}
+
+s->ahb_slave4 = 0x0008; /* ROM: base=0x, size=256MB */
+s->ahb_slave6 = 0x1009; /* RAM: base=0x1000, size=512MB */


Does this register provide information on max allowable RAM size or amount
of RAM actually accessible in a system? I mean,
should this register be modified accordingly if args->ram_size value is
less then 512MB?

 +
+/* A369 supports upto 512MB ram space */
+if (args->ram_size > 0x2000) {
+args->ram_size = 0x2000;
+}

 +
+/* Use parallel NOR flash for ROM emulation */
+dinfo = drive_get_next(IF_PFLASH);
+s->rom = pflash_cfi01_register(
+0,  /* base address */
+NULL,
+"a369.rom",
+6144,   /* 6 KB */
+dinfo ? dinfo->bdrv : NULL,


I think you should also consider a case when we're booting with bootstrap
code in ROM (no kernel_image specified). Right now,
if no rom image is specified, QEMU will abort with "trying to execute code
outside RAM" error. You could check for this case here
and abort QEMU with a more descriptive error.


 +1024,   /* 1 KB sector */
+6,  /* 6 sector per chip */
+4,  /* 32 bits */
+0, 0, 0, 0, /* id */
+0   /* Little Endian */);
+if (!s->rom) {
+hw_error("a369: failed to init ROM device.\n");
+exit(1);
+}
+
+/* Embedded RAM Init */
+memory_region_init_ram(s->sram, "a369.sram", 0x4000);
+vmstate_register_ram_global(s->sram);
+memory_region_add_subregion(s->as, 0xA000, s->sram);
+
+/* RAM Init */
+memory_region_init_ram(s->ram, "a369.ram", args->ram_size);
+vmstate_register_ram_global(s->ram);
+
+a369_device_init(s);
+
+if (args->kernel

[Qemu-devel] [PATCH v3 02/20] arm: add Faraday a369 SoC platform support

2013-02-06 Thread Kuo-Jung Su
From: Kuo-Jung Su 

The Faraday A369 EVB is a Faraday SoC platform evalution board used for
Faraday IP functional verification based on the well-known ARM AMBA 2.0
architecture.

Signed-off-by: Kuo-Jung Su 
---
 hw/arm/Makefile.objs |1 +
 hw/arm/faraday_a369.c|  161 +
 hw/arm/faraday_a369_keypad.c |  234 ++
 hw/arm/faraday_a369_scu.c|  188 +
 hw/arm/ftkbc010.h|   26 +
 5 files changed, 610 insertions(+)
 create mode 100644 hw/arm/faraday_a369.c
 create mode 100644 hw/arm/faraday_a369_keypad.c
 create mode 100644 hw/arm/faraday_a369_scu.c
 create mode 100644 hw/arm/ftkbc010.h

diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 59d7023..02d1a7b 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -34,3 +34,4 @@ obj-$(CONFIG_FDT) += ../device_tree.o
 
 obj-y := $(addprefix ../,$(obj-y))
 obj-y += faraday_a360.o faraday_a360_pmu.o
+obj-y += faraday_a369.o faraday_a369_scu.o faraday_a369_keypad.o
diff --git a/hw/arm/faraday_a369.c b/hw/arm/faraday_a369.c
new file mode 100644
index 000..e32dc7f
--- /dev/null
+++ b/hw/arm/faraday_a369.c
@@ -0,0 +1,161 @@
+/*
+ * Faraday A369 Evalution Board
+ *
+ * Copyright (c) 2012 Faraday Technology
+ * Written by Dante Su 
+ *
+ * This code is licensed under GNU GPL v2+.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "faraday.h"
+
+typedef FaradayMachStateA369State;
+
+/* Board init.  */
+
+static void
+a369_device_init(A369State *s)
+{
+/* Serial (FTUART010 which is 16550A compatible) */
+if (serial_hds[0]) {
+serial_mm_init(s->as,
+   0x92b0,
+   2,
+   NULL,
+   18432000 / 16,
+   serial_hds[0],
+   DEVICE_LITTLE_ENDIAN);
+}
+if (serial_hds[1]) {
+serial_mm_init(s->as,
+   0x92c0,
+   2,
+   NULL,
+   18432000 / 16,
+   serial_hds[1],
+   DEVICE_LITTLE_ENDIAN);
+}
+
+/* ftscu010 */
+s->scu = sysbus_create_simple("a369.scu", 0x9200, NULL);
+
+/* ftkbc010 */
+sysbus_create_simple("a369.keypad", 0x92f0, NULL);
+}
+
+static void
+a369_board_init(QEMUMachineInitArgs *args)
+{
+DriveInfo *dinfo;
+struct arm_boot_info *bi = NULL;
+A369State *s = g_new(A369State, 1);
+
+s->as = get_system_memory();
+s->ram = g_new(MemoryRegion, 1);
+s->sram = g_new(MemoryRegion, 1);
+
+/* CPU */
+if (!args->cpu_model) {
+args->cpu_model = "fa626te";
+}
+
+s->cpu = cpu_arm_init(args->cpu_model);
+if (!s->cpu) {
+args->cpu_model = "arm926";
+s->cpu = cpu_arm_init(args->cpu_model);
+if (!s->cpu) {
+hw_error("a369: Unable to find CPU definition\n");
+exit(1);
+}
+}
+
+s->ahb_slave4 = 0x0008; /* ROM: base=0x, size=256MB */
+s->ahb_slave6 = 0x1009; /* RAM: base=0x1000, size=512MB */
+
+/* A369 supports upto 512MB ram space */
+if (args->ram_size > 0x2000) {
+args->ram_size = 0x2000;
+}
+
+/* Use parallel NOR flash for ROM emulation */
+dinfo = drive_get_next(IF_PFLASH);
+s->rom = pflash_cfi01_register(
+0,  /* base address */
+NULL,
+"a369.rom",
+6144,   /* 6 KB */
+dinfo ? dinfo->bdrv : NULL,
+1024,   /* 1 KB sector */
+6,  /* 6 sector per chip */
+4,  /* 32 bits */
+0, 0, 0, 0, /* id */
+0   /* Little Endian */);
+if (!s->rom) {
+hw_error("a369: failed to init ROM device.\n");
+exit(1);
+}
+
+/* Embedded RAM Init */
+memory_region_init_ram(s->sram, "a369.sram", 0x4000);
+vmstate_register_ram_global(s->sram);
+memory_region_add_subregion(s->as, 0xA000, s->sram);
+
+/* RAM Init */
+memory_region_init_ram(s->ram, "a369.ram", args->ram_size);
+vmstate_register_ram_global(s->ram);
+
+a369_device_init(s);
+
+if (args->kernel_filename) {
+bi = g_new0(struct arm_boot_info, 1);
+
+/* RAM Address Binding */
+memory_region_add_subregion(s->as, 0x, s->ram);
+
+/* Boot Info */
+bi->ram_size = args->ram_size;
+bi->kernel_filename = args->kernel_filename;
+bi->kernel_cmdline = args->kernel_cmdline;
+bi->initrd_filename = args->initrd_filename;
+bi->board_id = 0xa369;
+arm_load_kernel(s->cpu, bi);
+} else {
+/* ROM Address Binding */
+sysbus_mmio_map(SYS_BUS_DEVICE(s->rom), 0, 0x)