Re: [Qemu-devel] [PATCH v5 1/7] stm32f205_timer: Add the stm32f205 Timer
On Tue, Oct 21, 2014 at 5:40 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Tue, Oct 21, 2014 at 5:05 PM, Alistair Francis alistai...@gmail.com
wrote:
On Mon, Oct 20, 2014 at 5:18 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
Sorry about the review delay...
On Thu, Oct 16, 2014 at 10:53 PM, Alistair Francis alistai...@gmail.com
wrote:
This patch adds the stm32f205 timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis alistai...@gmail.com
---
V4:
- Update timer units again
- Thanks to Peter C
V3:
- Update debug statements
- Correct the units for timer_mod
- Correctly set timer_offset from resets
V2:
- Reorder the Makefile config
- Fix up the debug printing
- Correct the timer event trigger
Changes from RFC:
- Small changes to functionality and style. Thanks to Peter C
- Rename to make the timer more generic
- Split the config settings to device level
default-configs/arm-softmmu.mak| 1 +
hw/timer/Makefile.objs | 2 +
hw/timer/stm32f205_timer.c | 318
+
include/hw/timer/stm32f205_timer.h | 101
4 files changed, 422 insertions(+)
create mode 100644 hw/timer/stm32f205_timer.c
create mode 100644 include/hw/timer/stm32f205_timer.h
diff --git a/default-configs/arm-softmmu.mak
b/default-configs/arm-softmmu.mak
index f3513fa..cf23b24 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -78,6 +78,7 @@ CONFIG_NSERIES=y
CONFIG_REALVIEW=y
CONFIG_ZAURUS=y
CONFIG_ZYNQ=y
+CONFIG_STM32F205_TIMER=y
CONFIG_VERSATILE_PCI=y
CONFIG_VERSATILE_I2C=y
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 2c86c3d..4bd9617 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -31,3 +31,5 @@ obj-$(CONFIG_DIGIC) += digic-timer.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
+
+common-obj-$(CONFIG_STM32F205_TIMER) += stm32f205_timer.o
diff --git a/hw/timer/stm32f205_timer.c b/hw/timer/stm32f205_timer.c
new file mode 100644
index 000..aace8df
--- /dev/null
+++ b/hw/timer/stm32f205_timer.c
@@ -0,0 +1,318 @@
+/*
+ * STM32F205 Timer
ST doc RM0033 which docs this timer refers to a larger family of SOCs.
I think you can change this from 205 to 2XX probably globally for the
series.
Ok, I will change all three devices
+ *
+ * Copyright (c) 2014 Alistair Francis alist...@alistair23.me
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
a copy
+ * of this software and associated documentation files (the Software),
to deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or
sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
IN
+ * THE SOFTWARE.
+ */
+
+#include hw/timer/stm32f205_timer.h
+
+#ifndef STM_TIMER_ERR_DEBUG
+#define STM_TIMER_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_TIMER_ERR_DEBUG = lvl) { \
+qemu_log(%s: fmt, __func__, ## args); \
+} \
+} while (0);
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s);
+
+static void stm32f205_timer_interrupt(void *opaque)
+{
+STM32f205TimerState *s = opaque;
+
+DB_PRINT(Interrupt\n);
+
+if (s-tim_dier TIM_DIER_UIE s-tim_cr1 TIM_CR1_CEN) {
+s-tim_sr |= 1;
+qemu_irq_pulse(s-irq);
+stm32f205_timer_set_alarm(s);
+}
+}
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s)
+{
+uint32_t ticks;
+int64_t now;
+
+DB_PRINT(Alarm set at: 0x%x\n, s-tim_cr1);
+
+now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
So now is in terms of ms.
+ticks = s-tim_arr - ((s-tick_offset + (now * (s-freq_hz / 1000))) /
tick_offset is terms of clock-cycles-before-prescalar. ticks and
tim_arr must be in terms of clock-cycles-post-pre-scalar.
Yes, that's correct
I'm slightly hazy on definition of tick_offset but i'm guessing its
the time offset of when the timer started expressed in
before-prescalar
Re: [Qemu-devel] [PATCH v5 1/7] stm32f205_timer: Add the stm32f205 Timer
On Mon, Oct 20, 2014 at 5:18 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
Sorry about the review delay...
On Thu, Oct 16, 2014 at 10:53 PM, Alistair Francis alistai...@gmail.com
wrote:
This patch adds the stm32f205 timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis alistai...@gmail.com
---
V4:
- Update timer units again
- Thanks to Peter C
V3:
- Update debug statements
- Correct the units for timer_mod
- Correctly set timer_offset from resets
V2:
- Reorder the Makefile config
- Fix up the debug printing
- Correct the timer event trigger
Changes from RFC:
- Small changes to functionality and style. Thanks to Peter C
- Rename to make the timer more generic
- Split the config settings to device level
default-configs/arm-softmmu.mak| 1 +
hw/timer/Makefile.objs | 2 +
hw/timer/stm32f205_timer.c | 318
+
include/hw/timer/stm32f205_timer.h | 101
4 files changed, 422 insertions(+)
create mode 100644 hw/timer/stm32f205_timer.c
create mode 100644 include/hw/timer/stm32f205_timer.h
diff --git a/default-configs/arm-softmmu.mak
b/default-configs/arm-softmmu.mak
index f3513fa..cf23b24 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -78,6 +78,7 @@ CONFIG_NSERIES=y
CONFIG_REALVIEW=y
CONFIG_ZAURUS=y
CONFIG_ZYNQ=y
+CONFIG_STM32F205_TIMER=y
CONFIG_VERSATILE_PCI=y
CONFIG_VERSATILE_I2C=y
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 2c86c3d..4bd9617 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -31,3 +31,5 @@ obj-$(CONFIG_DIGIC) += digic-timer.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
+
+common-obj-$(CONFIG_STM32F205_TIMER) += stm32f205_timer.o
diff --git a/hw/timer/stm32f205_timer.c b/hw/timer/stm32f205_timer.c
new file mode 100644
index 000..aace8df
--- /dev/null
+++ b/hw/timer/stm32f205_timer.c
@@ -0,0 +1,318 @@
+/*
+ * STM32F205 Timer
ST doc RM0033 which docs this timer refers to a larger family of SOCs.
I think you can change this from 205 to 2XX probably globally for the
series.
Ok, I will change all three devices
+ *
+ * Copyright (c) 2014 Alistair Francis alist...@alistair23.me
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include hw/timer/stm32f205_timer.h
+
+#ifndef STM_TIMER_ERR_DEBUG
+#define STM_TIMER_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_TIMER_ERR_DEBUG = lvl) { \
+qemu_log(%s: fmt, __func__, ## args); \
+} \
+} while (0);
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s);
+
+static void stm32f205_timer_interrupt(void *opaque)
+{
+STM32f205TimerState *s = opaque;
+
+DB_PRINT(Interrupt\n);
+
+if (s-tim_dier TIM_DIER_UIE s-tim_cr1 TIM_CR1_CEN) {
+s-tim_sr |= 1;
+qemu_irq_pulse(s-irq);
+stm32f205_timer_set_alarm(s);
+}
+}
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s)
+{
+uint32_t ticks;
+int64_t now;
+
+DB_PRINT(Alarm set at: 0x%x\n, s-tim_cr1);
+
+now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
So now is in terms of ms.
+ticks = s-tim_arr - ((s-tick_offset + (now * (s-freq_hz / 1000))) /
tick_offset is terms of clock-cycles-before-prescalar. ticks and
tim_arr must be in terms of clock-cycles-post-pre-scalar.
Yes, that's correct
I'm slightly hazy on definition of tick_offset but i'm guessing its
the time offset of when the timer started expressed in
before-prescalar cycles? I would then expect this to be:
ticks = tim_arr - (now * (scale) - tick_offset).
I think tick_offset should be added. That is what the PL031 timer does and
the timer
Re: [Qemu-devel] [PATCH v5 1/7] stm32f205_timer: Add the stm32f205 Timer
On Tue, Oct 21, 2014 at 5:05 PM, Alistair Francis alistai...@gmail.com wrote:
On Mon, Oct 20, 2014 at 5:18 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
Sorry about the review delay...
On Thu, Oct 16, 2014 at 10:53 PM, Alistair Francis alistai...@gmail.com
wrote:
This patch adds the stm32f205 timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis alistai...@gmail.com
---
V4:
- Update timer units again
- Thanks to Peter C
V3:
- Update debug statements
- Correct the units for timer_mod
- Correctly set timer_offset from resets
V2:
- Reorder the Makefile config
- Fix up the debug printing
- Correct the timer event trigger
Changes from RFC:
- Small changes to functionality and style. Thanks to Peter C
- Rename to make the timer more generic
- Split the config settings to device level
default-configs/arm-softmmu.mak| 1 +
hw/timer/Makefile.objs | 2 +
hw/timer/stm32f205_timer.c | 318
+
include/hw/timer/stm32f205_timer.h | 101
4 files changed, 422 insertions(+)
create mode 100644 hw/timer/stm32f205_timer.c
create mode 100644 include/hw/timer/stm32f205_timer.h
diff --git a/default-configs/arm-softmmu.mak
b/default-configs/arm-softmmu.mak
index f3513fa..cf23b24 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -78,6 +78,7 @@ CONFIG_NSERIES=y
CONFIG_REALVIEW=y
CONFIG_ZAURUS=y
CONFIG_ZYNQ=y
+CONFIG_STM32F205_TIMER=y
CONFIG_VERSATILE_PCI=y
CONFIG_VERSATILE_I2C=y
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 2c86c3d..4bd9617 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -31,3 +31,5 @@ obj-$(CONFIG_DIGIC) += digic-timer.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
+
+common-obj-$(CONFIG_STM32F205_TIMER) += stm32f205_timer.o
diff --git a/hw/timer/stm32f205_timer.c b/hw/timer/stm32f205_timer.c
new file mode 100644
index 000..aace8df
--- /dev/null
+++ b/hw/timer/stm32f205_timer.c
@@ -0,0 +1,318 @@
+/*
+ * STM32F205 Timer
ST doc RM0033 which docs this timer refers to a larger family of SOCs.
I think you can change this from 205 to 2XX probably globally for the
series.
Ok, I will change all three devices
+ *
+ * Copyright (c) 2014 Alistair Francis alist...@alistair23.me
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software),
to deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or
sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
IN
+ * THE SOFTWARE.
+ */
+
+#include hw/timer/stm32f205_timer.h
+
+#ifndef STM_TIMER_ERR_DEBUG
+#define STM_TIMER_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_TIMER_ERR_DEBUG = lvl) { \
+qemu_log(%s: fmt, __func__, ## args); \
+} \
+} while (0);
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s);
+
+static void stm32f205_timer_interrupt(void *opaque)
+{
+STM32f205TimerState *s = opaque;
+
+DB_PRINT(Interrupt\n);
+
+if (s-tim_dier TIM_DIER_UIE s-tim_cr1 TIM_CR1_CEN) {
+s-tim_sr |= 1;
+qemu_irq_pulse(s-irq);
+stm32f205_timer_set_alarm(s);
+}
+}
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s)
+{
+uint32_t ticks;
+int64_t now;
+
+DB_PRINT(Alarm set at: 0x%x\n, s-tim_cr1);
+
+now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
So now is in terms of ms.
+ticks = s-tim_arr - ((s-tick_offset + (now * (s-freq_hz / 1000))) /
tick_offset is terms of clock-cycles-before-prescalar. ticks and
tim_arr must be in terms of clock-cycles-post-pre-scalar.
Yes, that's correct
I'm slightly hazy on definition of tick_offset but i'm guessing its
the time offset of when the timer started expressed in
before-prescalar cycles? I would then expect this to be:
ticks = tim_arr - (now * (scale) - tick_offset).
Re: [Qemu-devel] [PATCH v5 1/7] stm32f205_timer: Add the stm32f205 Timer
Sorry about the review delay...
On Thu, Oct 16, 2014 at 10:53 PM, Alistair Francis alistai...@gmail.com wrote:
This patch adds the stm32f205 timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis alistai...@gmail.com
---
V4:
- Update timer units again
- Thanks to Peter C
V3:
- Update debug statements
- Correct the units for timer_mod
- Correctly set timer_offset from resets
V2:
- Reorder the Makefile config
- Fix up the debug printing
- Correct the timer event trigger
Changes from RFC:
- Small changes to functionality and style. Thanks to Peter C
- Rename to make the timer more generic
- Split the config settings to device level
default-configs/arm-softmmu.mak| 1 +
hw/timer/Makefile.objs | 2 +
hw/timer/stm32f205_timer.c | 318
+
include/hw/timer/stm32f205_timer.h | 101
4 files changed, 422 insertions(+)
create mode 100644 hw/timer/stm32f205_timer.c
create mode 100644 include/hw/timer/stm32f205_timer.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index f3513fa..cf23b24 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -78,6 +78,7 @@ CONFIG_NSERIES=y
CONFIG_REALVIEW=y
CONFIG_ZAURUS=y
CONFIG_ZYNQ=y
+CONFIG_STM32F205_TIMER=y
CONFIG_VERSATILE_PCI=y
CONFIG_VERSATILE_I2C=y
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 2c86c3d..4bd9617 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -31,3 +31,5 @@ obj-$(CONFIG_DIGIC) += digic-timer.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
+
+common-obj-$(CONFIG_STM32F205_TIMER) += stm32f205_timer.o
diff --git a/hw/timer/stm32f205_timer.c b/hw/timer/stm32f205_timer.c
new file mode 100644
index 000..aace8df
--- /dev/null
+++ b/hw/timer/stm32f205_timer.c
@@ -0,0 +1,318 @@
+/*
+ * STM32F205 Timer
ST doc RM0033 which docs this timer refers to a larger family of SOCs.
I think you can change this from 205 to 2XX probably globally for the
series.
+ *
+ * Copyright (c) 2014 Alistair Francis alist...@alistair23.me
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the
rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include hw/timer/stm32f205_timer.h
+
+#ifndef STM_TIMER_ERR_DEBUG
+#define STM_TIMER_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_TIMER_ERR_DEBUG = lvl) { \
+qemu_log(%s: fmt, __func__, ## args); \
+} \
+} while (0);
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s);
+
+static void stm32f205_timer_interrupt(void *opaque)
+{
+STM32f205TimerState *s = opaque;
+
+DB_PRINT(Interrupt\n);
+
+if (s-tim_dier TIM_DIER_UIE s-tim_cr1 TIM_CR1_CEN) {
+s-tim_sr |= 1;
+qemu_irq_pulse(s-irq);
+stm32f205_timer_set_alarm(s);
+}
+}
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s)
+{
+uint32_t ticks;
+int64_t now;
+
+DB_PRINT(Alarm set at: 0x%x\n, s-tim_cr1);
+
+now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
So now is in terms of ms.
+ticks = s-tim_arr - ((s-tick_offset + (now * (s-freq_hz / 1000))) /
tick_offset is terms of clock-cycles-before-prescalar. ticks and
tim_arr must be in terms of clock-cycles-post-pre-scalar.
I'm slightly hazy on definition of tick_offset but i'm guessing its
the time offset of when the timer started expressed in
before-prescalar cycles? I would then expect this to be:
ticks = tim_arr - (now * (scale) - tick_offset).
with (now * scale - tick_offset) / tim_psc corresponding to the
current value of the running timer (tim_cnt?).
+(s-tim_psc + 1));
So in total this expression is calculating a number of clock cycles
until a hit as ticks.
+
+
[Qemu-devel] [PATCH v5 1/7] stm32f205_timer: Add the stm32f205 Timer
This patch adds the stm32f205 timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis alistai...@gmail.com
---
V4:
- Update timer units again
- Thanks to Peter C
V3:
- Update debug statements
- Correct the units for timer_mod
- Correctly set timer_offset from resets
V2:
- Reorder the Makefile config
- Fix up the debug printing
- Correct the timer event trigger
Changes from RFC:
- Small changes to functionality and style. Thanks to Peter C
- Rename to make the timer more generic
- Split the config settings to device level
default-configs/arm-softmmu.mak| 1 +
hw/timer/Makefile.objs | 2 +
hw/timer/stm32f205_timer.c | 318 +
include/hw/timer/stm32f205_timer.h | 101
4 files changed, 422 insertions(+)
create mode 100644 hw/timer/stm32f205_timer.c
create mode 100644 include/hw/timer/stm32f205_timer.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index f3513fa..cf23b24 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -78,6 +78,7 @@ CONFIG_NSERIES=y
CONFIG_REALVIEW=y
CONFIG_ZAURUS=y
CONFIG_ZYNQ=y
+CONFIG_STM32F205_TIMER=y
CONFIG_VERSATILE_PCI=y
CONFIG_VERSATILE_I2C=y
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 2c86c3d..4bd9617 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -31,3 +31,5 @@ obj-$(CONFIG_DIGIC) += digic-timer.o
obj-$(CONFIG_MC146818RTC) += mc146818rtc.o
obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o
+
+common-obj-$(CONFIG_STM32F205_TIMER) += stm32f205_timer.o
diff --git a/hw/timer/stm32f205_timer.c b/hw/timer/stm32f205_timer.c
new file mode 100644
index 000..aace8df
--- /dev/null
+++ b/hw/timer/stm32f205_timer.c
@@ -0,0 +1,318 @@
+/*
+ * STM32F205 Timer
+ *
+ * Copyright (c) 2014 Alistair Francis alist...@alistair23.me
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the Software), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include hw/timer/stm32f205_timer.h
+
+#ifndef STM_TIMER_ERR_DEBUG
+#define STM_TIMER_ERR_DEBUG 0
+#endif
+
+#define DB_PRINT_L(lvl, fmt, args...) do { \
+if (STM_TIMER_ERR_DEBUG = lvl) { \
+qemu_log(%s: fmt, __func__, ## args); \
+} \
+} while (0);
+
+#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s);
+
+static void stm32f205_timer_interrupt(void *opaque)
+{
+STM32f205TimerState *s = opaque;
+
+DB_PRINT(Interrupt\n);
+
+if (s-tim_dier TIM_DIER_UIE s-tim_cr1 TIM_CR1_CEN) {
+s-tim_sr |= 1;
+qemu_irq_pulse(s-irq);
+stm32f205_timer_set_alarm(s);
+}
+}
+
+static void stm32f205_timer_set_alarm(STM32f205TimerState *s)
+{
+uint32_t ticks;
+int64_t now;
+
+DB_PRINT(Alarm set at: 0x%x\n, s-tim_cr1);
+
+now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
+ticks = s-tim_arr - ((s-tick_offset + (now * (s-freq_hz / 1000))) /
+(s-tim_psc + 1));
+
+DB_PRINT(Alarm set in %d ticks\n, ticks);
+
+if (ticks == 0) {
+timer_del(s-timer);
+stm32f205_timer_interrupt(s);
+} else {
+timer_mod(s-timer, ((now * (s-freq_hz / 1000)) / (s-tim_psc + 1)) +
+ (int64_t) ticks);
+DB_PRINT(Wait Time: % PRId64 ticks\n,
+ ((now * (s-freq_hz / 1000)) / (s-tim_psc + 1)) +
+ (int64_t) ticks);
+}
+}
+
+static void stm32f205_timer_reset(DeviceState *dev)
+{
+STM32f205TimerState *s = STM32F205TIMER(dev);
+
+s-tim_cr1 = 0;
+s-tim_cr2 = 0;
+s-tim_smcr = 0;
+s-tim_dier = 0;
+s-tim_sr = 0;
+s-tim_egr = 0;
+s-tim_ccmr1 = 0;
+s-tim_ccmr2 = 0;
+s-tim_ccer = 0;
+s-tim_cnt = 0;
+s-tim_psc = 0;
+s-tim_arr = 0;
+s-tim_ccr1 = 0;
+s-tim_ccr2 = 0;
+s-tim_ccr3 = 0;
+s-tim_ccr4 = 0;
+s-tim_dcr = 0;
+s-tim_dmar = 0;
+s-tim_or = 0;
+
+s-tick_offset =
