On Thu, Aug 22, 2019 at 10:29 PM Bin Meng wrote:
>
> At present each hart's hartid in a RISC-V hart array is assigned
> the same value of its index in the hart array. But for a system
> that has multiple hart arrays, this is not the case any more.
>
> Add a new "hartid-base" property so that hartid number can be
> assigned based on the property value.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v5: None
> Changes in v4:
> - new patch to add a "hartid-base" property to RISC-V hart array
>
> Changes in v3: None
> Changes in v2: None
>
> hw/riscv/riscv_hart.c | 8 +---
> include/hw/riscv/riscv_hart.h | 1 +
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c
> index 9deef869..52ab86a 100644
> --- a/hw/riscv/riscv_hart.c
> +++ b/hw/riscv/riscv_hart.c
> @@ -27,6 +27,7 @@
>
> static Property riscv_harts_props[] = {
> DEFINE_PROP_UINT32("num-harts", RISCVHartArrayState, num_harts, 1),
> +DEFINE_PROP_UINT32("hartid-base", RISCVHartArrayState, hartid_base, 0),
> DEFINE_PROP_STRING("cpu-type", RISCVHartArrayState, cpu_type),
> DEFINE_PROP_END_OF_LIST(),
> };
> @@ -37,7 +38,7 @@ static void riscv_harts_cpu_reset(void *opaque)
> cpu_reset(CPU(cpu));
> }
>
> -static void riscv_hart_realize(RISCVHartArrayState *s, int idx,
> +static void riscv_hart_realize(RISCVHartArrayState *s, int idx, uint32_t
> hartid,
> char *cpu_type, Error **errp)
Do we need to pass hartid, can't we just get it from s here?
> {
> Error *err = NULL;
> @@ -45,7 +46,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int
> idx,
> object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx],
> sizeof(RISCVCPU), cpu_type,
> &error_abort, NULL);
> -s->harts[idx].env.mhartid = idx;
> +s->harts[idx].env.mhartid = hartid;
> qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]);
> object_property_set_bool(OBJECT(&s->harts[idx]), true,
> "realized", &err);
> @@ -58,12 +59,13 @@ static void riscv_hart_realize(RISCVHartArrayState *s,
> int idx,
> static void riscv_harts_realize(DeviceState *dev, Error **errp)
> {
> RISCVHartArrayState *s = RISCV_HART_ARRAY(dev);
> +uint32_t hartid = s->hartid_base;
I think s->hartid_base can just be used directly, instead of a extra variable.
Alistair
> int n;
>
> s->harts = g_new0(RISCVCPU, s->num_harts);
>
> for (n = 0; n < s->num_harts; n++) {
> -riscv_hart_realize(s, n, s->cpu_type, errp);
> +riscv_hart_realize(s, n, hartid + n, s->cpu_type, errp);
> }
> }
>
> diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h
> index 0671d88..1984e30 100644
> --- a/include/hw/riscv/riscv_hart.h
> +++ b/include/hw/riscv/riscv_hart.h
> @@ -32,6 +32,7 @@ typedef struct RISCVHartArrayState {
>
> /*< public >*/
> uint32_t num_harts;
> +uint32_t hartid_base;
> char *cpu_type;
> RISCVCPU *harts;
> } RISCVHartArrayState;
> --
> 2.7.4
>
>
