Re: [Qemu-devel] [PATCH v6 04/10] ARM: Samsung exynos4210-based boards emulation

[Evgeny Voevodin]

On 01/12/2012 12:48 PM, Kyungmin Park wrote:

On 1/12/12, Evgeny Voevodin  wrote:

Add initial support of NURI and SMDKC210 boards

Signed-off-by: Evgeny Voevodin
---
  Makefile.target |3 +-
  hw/exynos4210.c |  202
+++
  hw/exynos4210.h |   37 +
  hw/exynos4_boards.c |  143 
  4 files changed, 384 insertions(+), 1 deletions(-)
  create mode 100644 hw/exynos4210.c
  create mode 100644 hw/exynos4_boards.c

diff --git a/Makefile.target b/Makefile.target
index 4ac257e..6199d44 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -339,7 +339,8 @@ obj-arm-y = integratorcp.o versatilepb.o arm_pic.o
arm_timer.o
  obj-arm-y += arm_boot.o pl011.o pl031.o pl050.o pl080.o pl110.o pl181.o
pl190.o
  obj-arm-y += versatile_pci.o
  obj-arm-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o
a9mpcore.o
-obj-arm-y += exynos4210_gic.o exynos4210_combiner.o
+obj-arm-y += exynos4210_gic.o exynos4210_combiner.o exynos4210.o
+obj-arm-y += exynos4_boards.o
  obj-arm-y += arm_l2x0.o
  obj-arm-y += arm_mptimer.o
  obj-arm-y += armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
new file mode 100644
index 000..82755db
--- /dev/null
+++ b/hw/exynos4210.c
@@ -0,0 +1,202 @@
+/*
+ *  Samsung exynos4210 SoC emulation
+ *
+ *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
+ *Maksim Kozlov
+ *Evgeny Voevodin
+ *Igor Mitsyanko
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but
WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, see.
+ *
+ */
+
+#include "boards.h"
+#include "sysemu.h"
+#include "sysbus.h"
+#include "arm-misc.h"
+#include "exynos4210.h"
+
+#define EXYNOS4210_CHIPID_ADDR 0x1000
+
+/* External GIC */
+#define EXYNOS4210_EXT_GIC_CPU_BASE_ADDR0x1048
+#define EXYNOS4210_EXT_GIC_DIST_BASE_ADDR   0x1049
+
+/* Combiner */
+#define EXYNOS4210_EXT_COMBINER_BASE_ADDR   0x1044
+#define EXYNOS4210_INT_COMBINER_BASE_ADDR   0x10448000

FYI: Even though there's internal combiner, it doesn't used any more.
and there's no codes at kernel.



Kernel v3.0 uses it. And I think that if HW contains one, it shouldn't 
be removed from emulation.


--
Kind regards,
Evgeny Voevodin,
Leading Software Engineer,
ASWG, Moscow R&D center, Samsung Electronics
e-mail: e.voevo...@samsung.com

[Qemu-devel] [PATCH v6 04/10] ARM: Samsung exynos4210-based boards emulation

[Evgeny Voevodin]

Add initial support of NURI and SMDKC210 boards

Signed-off-by: Evgeny Voevodin 
---
 Makefile.target |3 +-
 hw/exynos4210.c |  202 +++
 hw/exynos4210.h |   37 +
 hw/exynos4_boards.c |  143 
 4 files changed, 384 insertions(+), 1 deletions(-)
 create mode 100644 hw/exynos4210.c
 create mode 100644 hw/exynos4_boards.c

diff --git a/Makefile.target b/Makefile.target
index 4ac257e..6199d44 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -339,7 +339,8 @@ obj-arm-y = integratorcp.o versatilepb.o arm_pic.o 
arm_timer.o
 obj-arm-y += arm_boot.o pl011.o pl031.o pl050.o pl080.o pl110.o pl181.o pl190.o
 obj-arm-y += versatile_pci.o
 obj-arm-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o a9mpcore.o
-obj-arm-y += exynos4210_gic.o exynos4210_combiner.o
+obj-arm-y += exynos4210_gic.o exynos4210_combiner.o exynos4210.o
+obj-arm-y += exynos4_boards.o
 obj-arm-y += arm_l2x0.o
 obj-arm-y += arm_mptimer.o
 obj-arm-y += armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
new file mode 100644
index 000..82755db
--- /dev/null
+++ b/hw/exynos4210.c
@@ -0,0 +1,202 @@
+/*
+ *  Samsung exynos4210 SoC emulation
+ *
+ *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
+ *Maksim Kozlov 
+ *Evgeny Voevodin 
+ *Igor Mitsyanko  
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, see .
+ *
+ */
+
+#include "boards.h"
+#include "sysemu.h"
+#include "sysbus.h"
+#include "arm-misc.h"
+#include "exynos4210.h"
+
+#define EXYNOS4210_CHIPID_ADDR 0x1000
+
+/* External GIC */
+#define EXYNOS4210_EXT_GIC_CPU_BASE_ADDR0x1048
+#define EXYNOS4210_EXT_GIC_DIST_BASE_ADDR   0x1049
+
+/* Combiner */
+#define EXYNOS4210_EXT_COMBINER_BASE_ADDR   0x1044
+#define EXYNOS4210_INT_COMBINER_BASE_ADDR   0x10448000
+
+static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
+0x09, 0x00, 0x00, 0x00 };
+
+Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
+unsigned long ram_size)
+{
+qemu_irq cpu_irq[4];
+int n;
+Exynos4210State *s = g_new(Exynos4210State, 1);
+qemu_irq *irq_table;
+qemu_irq *irqp;
+qemu_irq gate_irq[EXYNOS4210_IRQ_GATE_NINPUTS];
+unsigned long mem_size;
+DeviceState *dev;
+SysBusDevice *busdev;
+
+for (n = 0; n < smp_cpus; n++) {
+s->env[n] = cpu_init("cortex-a9");
+if (!s->env[n]) {
+fprintf(stderr, "Unable to find CPU %d definition\n", n);
+exit(1);
+}
+/* Create PIC controller for each processor instance */
+irqp = arm_pic_init_cpu(s->env[n]);
+
+/*
+ * Get GICs gpio_in cpu_irq to connect a combiner to them later.
+ * Use only IRQ for a while.
+ */
+cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
+}
+
+/*** IRQs ***/
+
+s->irq_table = exynos4210_init_irq(&s->irqs);
+irq_table = s->irq_table;
+
+/* IRQ Gate */
+dev = qdev_create(NULL, "exynos4210.irq_gate");
+qdev_init_nofail(dev);
+/* Get IRQ Gate input in gate_irq */
+for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) {
+gate_irq[n] = qdev_get_gpio_in(dev, n);
+}
+busdev = sysbus_from_qdev(dev);
+/* Connect IRQ Gate output to cpu_irq */
+for (n = 0; n < smp_cpus; n++) {
+sysbus_connect_irq(busdev, n, cpu_irq[n]);
+}
+
+/* Private memory region and Internal GIC */
+dev = qdev_create(NULL, "a9mpcore_priv");
+qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
+qdev_init_nofail(dev);
+busdev = sysbus_from_qdev(dev);
+sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR);
+for (n = 0; n < smp_cpus; n++) {
+sysbus_connect_irq(busdev, n, gate_irq[n * 2]);
+}
+for (n = 0; n < EXYNOS4210_INT_GIC_NIRQ; n++) {
+s->irqs.int_gic_irq[n] = qdev_get_gpio_in(dev, n);
+}
+
+/* External GIC */
+dev = qdev_create(NULL, "exynos4210.gic");
+qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
+qdev_init_nofail(dev);
+busdev = sysbus_from_qdev(dev);
+/* Map CPU interface */
+sysbus_mmio_map(busdev, 0, EXYNOS4210_EXT_GIC_CPU_BASE_ADDR);
+/* Map Distributer interface */
+sysbus_mmio_map(busdev, 1, EXYNOS4210_EXT_GIC_DIST_BASE_ADDR);
+ 

Re: [Qemu-devel] [PATCH v6 04/10] ARM: Samsung exynos4210-based boards emulation

[Kyungmin Park]

On 1/12/12, Evgeny Voevodin  wrote:
> Add initial support of NURI and SMDKC210 boards
>
> Signed-off-by: Evgeny Voevodin 
> ---
>  Makefile.target |3 +-
>  hw/exynos4210.c |  202
> +++
>  hw/exynos4210.h |   37 +
>  hw/exynos4_boards.c |  143 
>  4 files changed, 384 insertions(+), 1 deletions(-)
>  create mode 100644 hw/exynos4210.c
>  create mode 100644 hw/exynos4_boards.c
>
> diff --git a/Makefile.target b/Makefile.target
> index 4ac257e..6199d44 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -339,7 +339,8 @@ obj-arm-y = integratorcp.o versatilepb.o arm_pic.o
> arm_timer.o
>  obj-arm-y += arm_boot.o pl011.o pl031.o pl050.o pl080.o pl110.o pl181.o
> pl190.o
>  obj-arm-y += versatile_pci.o
>  obj-arm-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o
> a9mpcore.o
> -obj-arm-y += exynos4210_gic.o exynos4210_combiner.o
> +obj-arm-y += exynos4210_gic.o exynos4210_combiner.o exynos4210.o
> +obj-arm-y += exynos4_boards.o
>  obj-arm-y += arm_l2x0.o
>  obj-arm-y += arm_mptimer.o
>  obj-arm-y += armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o
> diff --git a/hw/exynos4210.c b/hw/exynos4210.c
> new file mode 100644
> index 000..82755db
> --- /dev/null
> +++ b/hw/exynos4210.c
> @@ -0,0 +1,202 @@
> +/*
> + *  Samsung exynos4210 SoC emulation
> + *
> + *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
> + *Maksim Kozlov 
> + *Evgeny Voevodin 
> + *Igor Mitsyanko  
> + *
> + *  This program is free software; you can redistribute it and/or modify it
> + *  under the terms of the GNU General Public License as published by the
> + *  Free Software Foundation; either version 2 of the License, or
> + *  (at your option) any later version.
> + *
> + *  This program is distributed in the hope that it will be useful, but
> WITHOUT
> + *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
> + *  for more details.
> + *
> + *  You should have received a copy of the GNU General Public License along
> + *  with this program; if not, see .
> + *
> + */
> +
> +#include "boards.h"
> +#include "sysemu.h"
> +#include "sysbus.h"
> +#include "arm-misc.h"
> +#include "exynos4210.h"
> +
> +#define EXYNOS4210_CHIPID_ADDR 0x1000
> +
> +/* External GIC */
> +#define EXYNOS4210_EXT_GIC_CPU_BASE_ADDR0x1048
> +#define EXYNOS4210_EXT_GIC_DIST_BASE_ADDR   0x1049
> +
> +/* Combiner */
> +#define EXYNOS4210_EXT_COMBINER_BASE_ADDR   0x1044
> +#define EXYNOS4210_INT_COMBINER_BASE_ADDR   0x10448000
FYI: Even though there's internal combiner, it doesn't used any more.
and there's no codes at kernel.

Thank you,
Kyungmin Park
> +
> +static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
> +0x09, 0x00, 0x00, 0x00 };
> +
> +Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
> +unsigned long ram_size)
> +{
> +qemu_irq cpu_irq[4];
> +int n;
> +Exynos4210State *s = g_new(Exynos4210State, 1);
> +qemu_irq *irq_table;
> +qemu_irq *irqp;
> +qemu_irq gate_irq[EXYNOS4210_IRQ_GATE_NINPUTS];
> +unsigned long mem_size;
> +DeviceState *dev;
> +SysBusDevice *busdev;
> +
> +for (n = 0; n < smp_cpus; n++) {
> +s->env[n] = cpu_init("cortex-a9");
> +if (!s->env[n]) {
> +fprintf(stderr, "Unable to find CPU %d definition\n", n);
> +exit(1);
> +}
> +/* Create PIC controller for each processor instance */
> +irqp = arm_pic_init_cpu(s->env[n]);
> +
> +/*
> + * Get GICs gpio_in cpu_irq to connect a combiner to them later.
> + * Use only IRQ for a while.
> + */
> +cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
> +}
> +
> +/*** IRQs ***/
> +
> +s->irq_table = exynos4210_init_irq(&s->irqs);
> +irq_table = s->irq_table;
> +
> +/* IRQ Gate */
> +dev = qdev_create(NULL, "exynos4210.irq_gate");
> +qdev_init_nofail(dev);
> +/* Get IRQ Gate input in gate_irq */
> +for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) {
> +gate_irq[n] = qdev_get_gpio_in(dev, n);
> +}
> +busdev = sysbus_from_qdev(dev);
> +/* Connect IRQ Gate output to cpu_irq */
> +for (n = 0; n < smp_cpus; n++) {
> +sysbus_connect_irq(busdev, n, cpu_irq[n]);
> +}
> +
> +/* Private memory region and Internal GIC */
> +dev = qdev_create(NULL, "a9mpcore_priv");
> +qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
> +qdev_init_nofail(dev);
> +busdev = sysbus_from_qdev(dev);
> +sysbus_mmio_map(busdev, 0, EXYNOS4210_SMP_PRIVATE_BASE_ADDR);
> +for (n = 0; n < smp_cpus; n++) {
> +sysbus_connect_irq(busdev, n, gate_irq[n * 2]);
> +}
> +for (n = 0; n < EXYNOS4210_INT_GIC_NIRQ; n++) {
> +s->irqs.int_gic_ir