Board support for Kyoto Micro's KZM-ARM11-01, an evaluation board built
around the FreeScale i.MX31.
Signed-off-by: Philip O'Sullivan phil...@ok-labs.com
Signed-off-by: Peter Chubb peter.ch...@nicta.com.au
---
Makefile.target |2
hw/kzm.c| 161
2 files changed, 162 insertions(+), 1 deletion(-)
create mode 100644 hw/kzm.c
Index: qemu-working/hw/kzm.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ qemu-working/hw/kzm.c 2012-04-23 08:24:56.380974317 +1000
@@ -0,0 +1,161 @@
+/*
+ * KZM Board System emulation.
+ *
+ * Copyright (c) 2008 OKL and 2011 NICTA
+ * Written by Hans
+ * Updated by Peter Chubb.
+ *
+ * This code is licenced under the GPL, version 2 or later.
+ * See the file `COPYING' in the top level directory.
+ *
+ * It (partially) emulates a Kyoto Microcomputer
+ * KZM-ARM11-01 evaluation board, with a FreeScale
+ * I.MX31 SoC
+ */
+
+#include sysbus.h
+#include exec-memory.h
+#include hw.h
+#include arm-misc.h
+#include devices.h
+#include net.h
+#include sysemu.h
+#include boards.h
+#include pc.h /* for the FPGA UART that emulates a 16550 */
+#include imx.h
+
+/* Memory map for Kzm Emulation Baseboard:
+ * 0x-0x3fff 16k secure ROM IGNORED
+ * 0x4000-0x00407fff Reserved IGNORED
+ * 0x00404000-0x00407fff ROM IGNORED
+ * 0x00408000-0x0fff Reserved IGNORED
+ * 0x1000-0x1fffbfff RAM aliasing IGNORED
+ * 0x1fffc000-0x1fff RAM EMULATED
+ * 0x2000-0x2fff Reserved IGNORED
+ * 0x3000-0x7fff I.MX31 Internal Register Space
+ * 0x43f0 IO_AREA0
+ * 0x43f9 UART1 EMULATED
+ * 0x43f94000 UART2 EMULATED
+ * 0x6800 AVIC EMULATED
+ * 0x53f8 CCM EMULATED
+ * 0x53f94000 PIT 1 EMULATED
+ * 0x53f98000 PIT 2 EMULATED
+ * 0x53f9 GPT EMULATED
+ * 0x8000-0x87ff RAM EMULATED
+ * 0x8800-0x8fff RAM Aliasing EMULATED
+ * 0xa000-0xafff NAND Flash IGNORED
+ * 0xb000-0xb3ff Unavailable IGNORED
+ * 0xb400-0xb4000fff 8-bit free space IGNORED
+ * 0xb4001000-0xb400100f Board controlIGNORED
+ * 0xb4001003 DIP switch
+ * 0xb4001010-0xb400101f 7-segment LEDIGNORED
+ * 0xb4001020-0xb400102f LED IGNORED
+ * 0xb4001030-0xb400103f LED IGNORED
+ * 0xb4001040-0xb400104f FPGA, UART EMULATED
+ * 0xb4001050-0xb400105f FPGA, UART EMULATED
+ * 0xb4001060-0xb40f FPGA IGNORED
+ * 0xb600-0xb61f LAN controller EMULATED
+ * 0xb620-0xb62f FPGA NAND Controller IGNORED
+ * 0xb630-0xb7ff Free IGNORED
+ * 0xb800-0xb8004fff Memory control registers IGNORED
+ * 0xc000-0xc3ff PCMCIA/CFIGNORED
+ * 0xc400-0x Reserved IGNORED
+ */
+
+#define KZM_RAMADDRESS (0x8000)
+#define KZM_FPGA (0xb4001040)
+
+static struct arm_boot_info kzm_binfo = {
+.loader_start = KZM_RAMADDRESS,
+.board_id = 1722,
+};
+
+static void kzm_init(ram_addr_t ram_size,
+ const char *boot_device,
+ const char *kernel_filename, const char *kernel_cmdline,
+ const char *initrd_filename, const char *cpu_model)
+{
+CPUARMState *env;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion *ram = g_new(MemoryRegion, 1);
+MemoryRegion *sram = g_new(MemoryRegion, 1);
+MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
+qemu_irq *cpu_pic;
+DeviceState *dev;
+DeviceState *ccm;
+
+if (!cpu_model) {
+cpu_model = arm1136;
+}
+
+env = cpu_init(cpu_model);
+if (!env) {
+fprintf(stderr, Unable to find CPU definition\n);
+exit(1);
+}
+
+/* On a real system, the first 16k is a `secure boot rom' */
+
+memory_region_init_ram(ram, kzm.ram, ram_size);
+vmstate_register_ram_global(ram);
+memory_region_add_subregion(address_space_mem, KZM_RAMADDRESS, ram);
+
+memory_region_init_alias(ram_alias, ram.alias, ram, 0, ram_size);
+memory_region_add_subregion(address_space_mem, 0x8800, ram_alias);
+
+memory_region_init_ram(sram, kzm.sram, 0x4000);
+memory_region_add_subregion(address_space_mem, 0x1FFFC000, sram);
+
+
+cpu_pic = arm_pic_init_cpu(env);
+dev = sysbus_create_varargs(imx_avic, 0x6800,
+ cpu_pic[ARM_PIC_CPU_IRQ],
+
