Re: [Qemu-devel] [PATCH v6 6/9] xlnx-zynqmp-pmu: Connect the PMU interrupt controller

2018-01-18 Thread Philippe Mathieu-Daudé
On 01/18/2018 03:38 PM, Alistair Francis wrote:
> Signed-off-by: Alistair Francis 
> Reviewed-by: Edgar E. Iglesias 

Reviewed-by: Philippe Mathieu-Daudé 

> ---
> 
>  hw/microblaze/xlnx-zynqmp-pmu.c | 24 
>  1 file changed, 24 insertions(+)
> 
> diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
> index 145837b372..7312bfe23e 100644
> --- a/hw/microblaze/xlnx-zynqmp-pmu.c
> +++ b/hw/microblaze/xlnx-zynqmp-pmu.c
> @@ -24,6 +24,8 @@
>  #include "cpu.h"
>  #include "boot.h"
>  
> +#include "hw/intc/xlnx-pmu-iomod-intc.h"
> +
>  /* Define the PMU device */
>  
>  #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
> @@ -34,14 +36,18 @@
>  #define XLNX_ZYNQMP_PMU_ROM_ADDR0xFFD0
>  #define XLNX_ZYNQMP_PMU_RAM_ADDR0xFFDC
>  
> +#define XLNX_ZYNQMP_PMU_INTC_ADDR   0xFFD4
> +
>  typedef struct XlnxZynqMPPMUSoCState {
>  /*< private >*/
>  DeviceState parent_obj;
>  
>  /*< public >*/
>  MicroBlazeCPU cpu;
> +XlnxPMUIOIntc intc;
>  }  XlnxZynqMPPMUSoCState;
>  
> +
>  static void xlnx_zynqmp_pmu_soc_init(Object *obj)
>  {
>  XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj);
> @@ -50,6 +56,9 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
>TYPE_MICROBLAZE_CPU);
>  object_property_add_child(obj, "pmu-cpu", OBJECT(&s->cpu),
>&error_abort);
> +
> +object_initialize(&s->intc, sizeof(s->intc), TYPE_XLNX_PMU_IO_INTC);
> +qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default());
>  }
>  
>  static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
> @@ -80,6 +89,21 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, 
> Error **errp)
>  error_propagate(errp, err);
>  return;
>  }
> +
> +object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
> + &error_abort);
> +object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
> + &error_abort);
> +object_property_set_uint(OBJECT(&s->intc), 0x, "intc-positive",
> + &error_abort);
> +object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
> +if (err) {
> +error_propagate(errp, err);
> +return;
> +}
> +sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR);
> +sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0,
> +   qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ));
>  }
>  
>  static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data)
> 



[Qemu-devel] [PATCH v6 6/9] xlnx-zynqmp-pmu: Connect the PMU interrupt controller

2018-01-18 Thread Alistair Francis
Signed-off-by: Alistair Francis 
Reviewed-by: Edgar E. Iglesias 
---

 hw/microblaze/xlnx-zynqmp-pmu.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 145837b372..7312bfe23e 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -24,6 +24,8 @@
 #include "cpu.h"
 #include "boot.h"
 
+#include "hw/intc/xlnx-pmu-iomod-intc.h"
+
 /* Define the PMU device */
 
 #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
@@ -34,14 +36,18 @@
 #define XLNX_ZYNQMP_PMU_ROM_ADDR0xFFD0
 #define XLNX_ZYNQMP_PMU_RAM_ADDR0xFFDC
 
+#define XLNX_ZYNQMP_PMU_INTC_ADDR   0xFFD4
+
 typedef struct XlnxZynqMPPMUSoCState {
 /*< private >*/
 DeviceState parent_obj;
 
 /*< public >*/
 MicroBlazeCPU cpu;
+XlnxPMUIOIntc intc;
 }  XlnxZynqMPPMUSoCState;
 
+
 static void xlnx_zynqmp_pmu_soc_init(Object *obj)
 {
 XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj);
@@ -50,6 +56,9 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj)
   TYPE_MICROBLAZE_CPU);
 object_property_add_child(obj, "pmu-cpu", OBJECT(&s->cpu),
   &error_abort);
+
+object_initialize(&s->intc, sizeof(s->intc), TYPE_XLNX_PMU_IO_INTC);
+qdev_set_parent_bus(DEVICE(&s->intc), sysbus_get_default());
 }
 
 static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp)
@@ -80,6 +89,21 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, 
Error **errp)
 error_propagate(errp, err);
 return;
 }
+
+object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size",
+ &error_abort);
+object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge",
+ &error_abort);
+object_property_set_uint(OBJECT(&s->intc), 0x, "intc-positive",
+ &error_abort);
+object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
+if (err) {
+error_propagate(errp, err);
+return;
+}
+sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR);
+sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0,
+   qdev_get_gpio_in(DEVICE(&s->cpu), MB_CPU_IRQ));
 }
 
 static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data)
-- 
2.14.1