Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-15 Thread David Gibson
On Tue, Dec 11, 2018 at 05:44:26PM +0100, Cédric Le Goater wrote:
> On 12/11/18 11:42 AM, Cédric Le Goater wrote:
> > On 12/11/18 3:06 AM, David Gibson wrote:
> >> On Mon, Dec 10, 2018 at 11:17:33PM +0100, Cédric Le Goater wrote:
> >>> On 12/9/18 8:46 PM, Cédric Le Goater wrote:
>  This pseries machine makes use of a new sPAPR IRQ backend supporting
>  the XIVE interrupt mode.
> 
>  The guest OS is required to have support for the XIVE exploitation
>  mode of the POWER9 interrupt controller.
> 
>  Signed-off-by: Cédric Le Goater 
>  ---
>   hw/ppc/spapr.c | 15 +++
>   1 file changed, 15 insertions(+)
> 
>  diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>  index 4012ebd794a4..3cc134a0b673 100644
>  --- a/hw/ppc/spapr.c
>  +++ b/hw/ppc/spapr.c
>  @@ -3985,6 +3985,21 @@ static void 
>  spapr_machine_4_0_class_options(MachineClass *mc)
>   
>   DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
>   
>  +static void spapr_machine_4_0_xive_instance_options(MachineState 
>  *machine)
>  +{
>  +spapr_machine_4_0_instance_options(machine);
>  +}
>  +
>  +static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
>  +{
>  +sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
>  +
>  +spapr_machine_4_0_class_options(mc);> +smc->irq = 
>  &spapr_irq_xive;
> >>>
> >>> I have been adding checks on the CPU model to export the XIVE capability 
> >>> only on POWER9 processors but it breaks some of the tests.
> >>>
> >>> I was wondering if we could add a default POWER9 CPU to the -xive machine 
> >>> : 
> >>>
> >>>   + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
> >>>
> >>> and if we could change tests/cpu-plug-test.c with :
> >>>
> >>>   @@ -198,8 +198,13 @@ static void add_pseries_test_case(const
> >>>}
> >>>data = g_new(PlugTestData, 1);
> >>>data->machine = g_strdup(mname);
> >>>   -data->cpu_model = "power8_v2.0";
> >>>   -data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
> >>>   +if (g_str_has_suffix(mname, "xive")) {
> >>>   +data->cpu_model = "power9_v2.0";
> >>>   +data->device_model = g_strdup("power9_v2.0-spapr-cpu-core");
> >>>   +} else {
> >>>   +data->cpu_model = "power8_v2.0";
> >>>   +data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
> >>>   +}
> >>>data->sockets = 2;
> >>>data->cores = 3;
> >>>data->threads = 1;
> >>>
> >>> or if there is a better way ?
> >>
> >> So, I'd actually prefer a machine option, rather than wholly separate
> >> machine types to select xics/xive/dual.  Machine types was fine while
> >> prototyping this, but I don't think we want to actually merge new
> >> machine types for it.
> > 
> > I agree. 
> > 
> >> So, instead I think we want a machine option which can be set to
> >> xics/xive/dual, with xics being the default for earlier machine types
> >> and dual the default for 4.0 onwards.
> > 
> > I will revive an old patch doing just that. 
> > 
> > The question now is how to link the sPAPRMachineState instance to 
> > the selected sPAPR IRQ backend. 
> 
> Would something like below be acceptable ? If so I will change the 
> remaining patches to use 'spapr->irq' and not 'smc->irq' anymore.

Yeah, I think that looks ok.

>  
> Thanks,
> 
> C.
> 
> Index: qemu-xive.git/include/hw/ppc/spapr.h
> ===
> --- qemu-xive.git.orig/include/hw/ppc/spapr.h
> +++ qemu-xive.git/include/hw/ppc/spapr.h
> @@ -177,6 +177,7 @@ struct sPAPRMachineState {
>  int32_t irq_map_nr;
>  unsigned long *irq_map;
>  sPAPRXive  *xive;
> +sPAPRIrq *irq;
>  
>  bool cmd_line_caps[SPAPR_CAP_NUM];
>  sPAPRCapabilities def, eff, mig;
> Index: qemu-xive.git/hw/ppc/spapr.c
> ===
> --- qemu-xive.git.orig/hw/ppc/spapr.c
> +++ qemu-xive.git/hw/ppc/spapr.c
> @@ -1302,7 +1301,7 @@ static void *spapr_build_fdt(sPAPRMachin
>  }
>  
>  QLIST_FOREACH(phb, &spapr->phbs, list) {
> -ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt, 
> smc->irq->nr_msis);
> +ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt, 
> spapr->irq->nr_msis);
>  if (ret < 0) {
>  error_report("couldn't setup PCI devices in fdt");
>  exit(1);
> @@ -3056,9 +3055,38 @@ static void spapr_set_vsmt(Object *obj,
>  visit_type_uint32(v, name, (uint32_t *)opaque, errp);
>  }
>  
> +static char *spapr_get_irq(Object *obj, Error **errp)
> +{
> +sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
> +
> +if (spapr->irq == &spapr_irq_xics_legacy) {
> +return g_strdup("legacy");
> +} else if (spapr->irq == &spapr_irq_xics) {
> +return g_strdup("xics");
> +} else if (spapr->irq == &spapr_irq_xive) {
> +return g_strdup("xive");
> +}
> +g_assert_

Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-11 Thread Cédric Le Goater
[ ... ]

>>> So, instead I think we want a machine option which can be set to
>>> xics/xive/dual, with xics being the default for earlier machine types
>>> and dual the default for 4.0 onwards.
>>
>> I will revive an old patch doing just that. 
>>
>> The question now is how to link the sPAPRMachineState instance to 
>> the selected sPAPR IRQ backend. 
>>
>> I don't think we can move 'smc->irq' to sPAPRMachineState.
> 
> I think you could..
> 
>> So we will
>> need an helper returning the appropriate backend depending on the machine 
>> option and 'smc->irq' should disappear.
> 
> ..but this approach might be easier.

I proposed the first approach in v8. We can add the missing wrappers 
in a second round and move then under spapr_irq.h. These are :
 
ops :

   spapr->irq->dt_populate   spapr->irq->print_info
   spapr->irq->cpu_intc_create (this name is too long)

constants :

   spapr->irq->ov5
   spapr->irq->nr_msis

C.



Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-11 Thread David Gibson
On Tue, Dec 11, 2018 at 11:42:03AM +0100, Cédric Le Goater wrote:
> On 12/11/18 3:06 AM, David Gibson wrote:
> > On Mon, Dec 10, 2018 at 11:17:33PM +0100, Cédric Le Goater wrote:
> >> On 12/9/18 8:46 PM, Cédric Le Goater wrote:
> >>> This pseries machine makes use of a new sPAPR IRQ backend supporting
> >>> the XIVE interrupt mode.
> >>>
> >>> The guest OS is required to have support for the XIVE exploitation
> >>> mode of the POWER9 interrupt controller.
> >>>
> >>> Signed-off-by: Cédric Le Goater 
> >>> ---
> >>>  hw/ppc/spapr.c | 15 +++
> >>>  1 file changed, 15 insertions(+)
> >>>
> >>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> >>> index 4012ebd794a4..3cc134a0b673 100644
> >>> --- a/hw/ppc/spapr.c
> >>> +++ b/hw/ppc/spapr.c
> >>> @@ -3985,6 +3985,21 @@ static void 
> >>> spapr_machine_4_0_class_options(MachineClass *mc)
> >>>  
> >>>  DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
> >>>  
> >>> +static void spapr_machine_4_0_xive_instance_options(MachineState 
> >>> *machine)
> >>> +{
> >>> +spapr_machine_4_0_instance_options(machine);
> >>> +}
> >>> +
> >>> +static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
> >>> +{
> >>> +sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
> >>> +
> >>> +spapr_machine_4_0_class_options(mc);> +smc->irq = 
> >>> &spapr_irq_xive;
> >>
> >> I have been adding checks on the CPU model to export the XIVE capability 
> >> only on POWER9 processors but it breaks some of the tests.
> >>
> >> I was wondering if we could add a default POWER9 CPU to the -xive machine 
> >> : 
> >>
> >>   + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
> >>
> >> and if we could change tests/cpu-plug-test.c with :
> >>
> >>   @@ -198,8 +198,13 @@ static void add_pseries_test_case(const
> >>}
> >>data = g_new(PlugTestData, 1);
> >>data->machine = g_strdup(mname);
> >>   -data->cpu_model = "power8_v2.0";
> >>   -data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
> >>   +if (g_str_has_suffix(mname, "xive")) {
> >>   +data->cpu_model = "power9_v2.0";
> >>   +data->device_model = g_strdup("power9_v2.0-spapr-cpu-core");
> >>   +} else {
> >>   +data->cpu_model = "power8_v2.0";
> >>   +data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
> >>   +}
> >>data->sockets = 2;
> >>data->cores = 3;
> >>data->threads = 1;
> >>
> >> or if there is a better way ?
> > 
> > So, I'd actually prefer a machine option, rather than wholly separate
> > machine types to select xics/xive/dual.  Machine types was fine while
> > prototyping this, but I don't think we want to actually merge new
> > machine types for it.
> 
> I agree. 
> 
> > So, instead I think we want a machine option which can be set to
> > xics/xive/dual, with xics being the default for earlier machine types
> > and dual the default for 4.0 onwards.
> 
> I will revive an old patch doing just that. 
> 
> The question now is how to link the sPAPRMachineState instance to 
> the selected sPAPR IRQ backend. 
> 
> I don't think we can move 'smc->irq' to sPAPRMachineState.

I think you could..

> So we will
> need an helper returning the appropriate backend depending on the machine 
> option and 'smc->irq' should disappear.

..but this approach might be easier.

> 
> > We can make POWER9 the default cpu for 4.0 onwards as well, if you want.
> 
> OK.
> 
> C.
> 

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-11 Thread Cédric Le Goater
On 12/11/18 11:42 AM, Cédric Le Goater wrote:
> On 12/11/18 3:06 AM, David Gibson wrote:
>> On Mon, Dec 10, 2018 at 11:17:33PM +0100, Cédric Le Goater wrote:
>>> On 12/9/18 8:46 PM, Cédric Le Goater wrote:
 This pseries machine makes use of a new sPAPR IRQ backend supporting
 the XIVE interrupt mode.

 The guest OS is required to have support for the XIVE exploitation
 mode of the POWER9 interrupt controller.

 Signed-off-by: Cédric Le Goater 
 ---
  hw/ppc/spapr.c | 15 +++
  1 file changed, 15 insertions(+)

 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
 index 4012ebd794a4..3cc134a0b673 100644
 --- a/hw/ppc/spapr.c
 +++ b/hw/ppc/spapr.c
 @@ -3985,6 +3985,21 @@ static void 
 spapr_machine_4_0_class_options(MachineClass *mc)
  
  DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
  
 +static void spapr_machine_4_0_xive_instance_options(MachineState *machine)
 +{
 +spapr_machine_4_0_instance_options(machine);
 +}
 +
 +static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
 +{
 +sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
 +
 +spapr_machine_4_0_class_options(mc);> +smc->irq = &spapr_irq_xive;
>>>
>>> I have been adding checks on the CPU model to export the XIVE capability 
>>> only on POWER9 processors but it breaks some of the tests.
>>>
>>> I was wondering if we could add a default POWER9 CPU to the -xive machine : 
>>>
>>>   + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
>>>
>>> and if we could change tests/cpu-plug-test.c with :
>>>
>>>   @@ -198,8 +198,13 @@ static void add_pseries_test_case(const
>>>}
>>>data = g_new(PlugTestData, 1);
>>>data->machine = g_strdup(mname);
>>>   -data->cpu_model = "power8_v2.0";
>>>   -data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
>>>   +if (g_str_has_suffix(mname, "xive")) {
>>>   +data->cpu_model = "power9_v2.0";
>>>   +data->device_model = g_strdup("power9_v2.0-spapr-cpu-core");
>>>   +} else {
>>>   +data->cpu_model = "power8_v2.0";
>>>   +data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
>>>   +}
>>>data->sockets = 2;
>>>data->cores = 3;
>>>data->threads = 1;
>>>
>>> or if there is a better way ?
>>
>> So, I'd actually prefer a machine option, rather than wholly separate
>> machine types to select xics/xive/dual.  Machine types was fine while
>> prototyping this, but I don't think we want to actually merge new
>> machine types for it.
> 
> I agree. 
> 
>> So, instead I think we want a machine option which can be set to
>> xics/xive/dual, with xics being the default for earlier machine types
>> and dual the default for 4.0 onwards.
> 
> I will revive an old patch doing just that. 
> 
> The question now is how to link the sPAPRMachineState instance to 
> the selected sPAPR IRQ backend. 

Would something like below be acceptable ? If so I will change the 
remaining patches to use 'spapr->irq' and not 'smc->irq' anymore.
 
Thanks,

C.

Index: qemu-xive.git/include/hw/ppc/spapr.h
===
--- qemu-xive.git.orig/include/hw/ppc/spapr.h
+++ qemu-xive.git/include/hw/ppc/spapr.h
@@ -177,6 +177,7 @@ struct sPAPRMachineState {
 int32_t irq_map_nr;
 unsigned long *irq_map;
 sPAPRXive  *xive;
+sPAPRIrq *irq;
 
 bool cmd_line_caps[SPAPR_CAP_NUM];
 sPAPRCapabilities def, eff, mig;
Index: qemu-xive.git/hw/ppc/spapr.c
===
--- qemu-xive.git.orig/hw/ppc/spapr.c
+++ qemu-xive.git/hw/ppc/spapr.c
@@ -1302,7 +1301,7 @@ static void *spapr_build_fdt(sPAPRMachin
 }
 
 QLIST_FOREACH(phb, &spapr->phbs, list) {
-ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt, smc->irq->nr_msis);
+ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt, 
spapr->irq->nr_msis);
 if (ret < 0) {
 error_report("couldn't setup PCI devices in fdt");
 exit(1);
@@ -3056,9 +3055,38 @@ static void spapr_set_vsmt(Object *obj,
 visit_type_uint32(v, name, (uint32_t *)opaque, errp);
 }
 
+static char *spapr_get_irq(Object *obj, Error **errp)
+{
+sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
+
+if (spapr->irq == &spapr_irq_xics_legacy) {
+return g_strdup("legacy");
+} else if (spapr->irq == &spapr_irq_xics) {
+return g_strdup("xics");
+} else if (spapr->irq == &spapr_irq_xive) {
+return g_strdup("xive");
+}
+g_assert_not_reached();
+}
+
+static void spapr_set_irq(Object *obj, const char *value, Error **errp)
+{
+sPAPRMachineState *spapr = SPAPR_MACHINE(obj);
+
+/* We don't want to set the legacy IRQ backend */
+if (strcmp(value, "xics") == 0) {
+spapr->irq = &spapr_irq_xics;
+} else if (strcmp(value, "xive") == 0) {
+spapr->irq = &spapr_irq_xive;
+} else

Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-11 Thread Cédric Le Goater
On 12/11/18 3:06 AM, David Gibson wrote:
> On Mon, Dec 10, 2018 at 11:17:33PM +0100, Cédric Le Goater wrote:
>> On 12/9/18 8:46 PM, Cédric Le Goater wrote:
>>> This pseries machine makes use of a new sPAPR IRQ backend supporting
>>> the XIVE interrupt mode.
>>>
>>> The guest OS is required to have support for the XIVE exploitation
>>> mode of the POWER9 interrupt controller.
>>>
>>> Signed-off-by: Cédric Le Goater 
>>> ---
>>>  hw/ppc/spapr.c | 15 +++
>>>  1 file changed, 15 insertions(+)
>>>
>>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>>> index 4012ebd794a4..3cc134a0b673 100644
>>> --- a/hw/ppc/spapr.c
>>> +++ b/hw/ppc/spapr.c
>>> @@ -3985,6 +3985,21 @@ static void 
>>> spapr_machine_4_0_class_options(MachineClass *mc)
>>>  
>>>  DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
>>>  
>>> +static void spapr_machine_4_0_xive_instance_options(MachineState *machine)
>>> +{
>>> +spapr_machine_4_0_instance_options(machine);
>>> +}
>>> +
>>> +static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
>>> +{
>>> +sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
>>> +
>>> +spapr_machine_4_0_class_options(mc);> +smc->irq = &spapr_irq_xive;
>>
>> I have been adding checks on the CPU model to export the XIVE capability 
>> only on POWER9 processors but it breaks some of the tests.
>>
>> I was wondering if we could add a default POWER9 CPU to the -xive machine : 
>>
>>   + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
>>
>> and if we could change tests/cpu-plug-test.c with :
>>
>>   @@ -198,8 +198,13 @@ static void add_pseries_test_case(const
>>}
>>data = g_new(PlugTestData, 1);
>>data->machine = g_strdup(mname);
>>   -data->cpu_model = "power8_v2.0";
>>   -data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
>>   +if (g_str_has_suffix(mname, "xive")) {
>>   +data->cpu_model = "power9_v2.0";
>>   +data->device_model = g_strdup("power9_v2.0-spapr-cpu-core");
>>   +} else {
>>   +data->cpu_model = "power8_v2.0";
>>   +data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
>>   +}
>>data->sockets = 2;
>>data->cores = 3;
>>data->threads = 1;
>>
>> or if there is a better way ?
> 
> So, I'd actually prefer a machine option, rather than wholly separate
> machine types to select xics/xive/dual.  Machine types was fine while
> prototyping this, but I don't think we want to actually merge new
> machine types for it.

I agree. 

> So, instead I think we want a machine option which can be set to
> xics/xive/dual, with xics being the default for earlier machine types
> and dual the default for 4.0 onwards.

I will revive an old patch doing just that. 

The question now is how to link the sPAPRMachineState instance to 
the selected sPAPR IRQ backend. 

I don't think we can move 'smc->irq' to sPAPRMachineState. So we will
need an helper returning the appropriate backend depending on the machine 
option and 'smc->irq' should disappear.

> We can make POWER9 the default cpu for 4.0 onwards as well, if you want.

OK.

C.




Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-10 Thread David Gibson
On Mon, Dec 10, 2018 at 11:17:33PM +0100, Cédric Le Goater wrote:
> On 12/9/18 8:46 PM, Cédric Le Goater wrote:
> > This pseries machine makes use of a new sPAPR IRQ backend supporting
> > the XIVE interrupt mode.
> > 
> > The guest OS is required to have support for the XIVE exploitation
> > mode of the POWER9 interrupt controller.
> > 
> > Signed-off-by: Cédric Le Goater 
> > ---
> >  hw/ppc/spapr.c | 15 +++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index 4012ebd794a4..3cc134a0b673 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -3985,6 +3985,21 @@ static void 
> > spapr_machine_4_0_class_options(MachineClass *mc)
> >  
> >  DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
> >  
> > +static void spapr_machine_4_0_xive_instance_options(MachineState *machine)
> > +{
> > +spapr_machine_4_0_instance_options(machine);
> > +}
> > +
> > +static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
> > +{
> > +sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
> > +
> > +spapr_machine_4_0_class_options(mc);> +smc->irq = &spapr_irq_xive;
> 
> I have been adding checks on the CPU model to export the XIVE capability 
> only on POWER9 processors but it breaks some of the tests.
> 
> I was wondering if we could add a default POWER9 CPU to the -xive machine : 
> 
>   + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");
> 
> and if we could change tests/cpu-plug-test.c with :
> 
>   @@ -198,8 +198,13 @@ static void add_pseries_test_case(const
>}
>data = g_new(PlugTestData, 1);
>data->machine = g_strdup(mname);
>   -data->cpu_model = "power8_v2.0";
>   -data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
>   +if (g_str_has_suffix(mname, "xive")) {
>   +data->cpu_model = "power9_v2.0";
>   +data->device_model = g_strdup("power9_v2.0-spapr-cpu-core");
>   +} else {
>   +data->cpu_model = "power8_v2.0";
>   +data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
>   +}
>data->sockets = 2;
>data->cores = 3;
>data->threads = 1;
> 
> or if there is a better way ?

So, I'd actually prefer a machine option, rather than wholly separate
machine types to select xics/xive/dual.  Machine types was fine while
prototyping this, but I don't think we want to actually merge new
machine types for it.

So, instead I think we want a machine option which can be set to
xics/xive/dual, with xics being the default for earlier machine types
and dual the default for 4.0 onwards.  We can make POWER9 the default
cpu for 4.0 onwards as well, if you want.

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-10 Thread Cédric Le Goater
On 12/9/18 8:46 PM, Cédric Le Goater wrote:
> This pseries machine makes use of a new sPAPR IRQ backend supporting
> the XIVE interrupt mode.
> 
> The guest OS is required to have support for the XIVE exploitation
> mode of the POWER9 interrupt controller.
> 
> Signed-off-by: Cédric Le Goater 
> ---
>  hw/ppc/spapr.c | 15 +++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 4012ebd794a4..3cc134a0b673 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -3985,6 +3985,21 @@ static void 
> spapr_machine_4_0_class_options(MachineClass *mc)
>  
>  DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
>  
> +static void spapr_machine_4_0_xive_instance_options(MachineState *machine)
> +{
> +spapr_machine_4_0_instance_options(machine);
> +}
> +
> +static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
> +{
> +sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
> +
> +spapr_machine_4_0_class_options(mc);> +smc->irq = &spapr_irq_xive;

I have been adding checks on the CPU model to export the XIVE capability 
only on POWER9 processors but it breaks some of the tests.

I was wondering if we could add a default POWER9 CPU to the -xive machine : 

  + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0");

and if we could change tests/cpu-plug-test.c with :

  @@ -198,8 +198,13 @@ static void add_pseries_test_case(const
   }
   data = g_new(PlugTestData, 1);
   data->machine = g_strdup(mname);
  -data->cpu_model = "power8_v2.0";
  -data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
  +if (g_str_has_suffix(mname, "xive")) {
  +data->cpu_model = "power9_v2.0";
  +data->device_model = g_strdup("power9_v2.0-spapr-cpu-core");
  +} else {
  +data->cpu_model = "power8_v2.0";
  +data->device_model = g_strdup("power8_v2.0-spapr-cpu-core");
  +}
   data->sockets = 2;
   data->cores = 3;
   data->threads = 1;

or if there is a better way ? 

Thanks,

C.

> +}
> +
> +DEFINE_SPAPR_MACHINE(4_0_xive, "4.0-xive", false);
> +
>  /*
>   * pseries-3.1
>   */
> 
 



[Qemu-devel] [PATCH v7 18/19] spapr: add a 'pseries-4.0-xive' machine type

2018-12-09 Thread Cédric Le Goater
This pseries machine makes use of a new sPAPR IRQ backend supporting
the XIVE interrupt mode.

The guest OS is required to have support for the XIVE exploitation
mode of the POWER9 interrupt controller.

Signed-off-by: Cédric Le Goater 
---
 hw/ppc/spapr.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 4012ebd794a4..3cc134a0b673 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3985,6 +3985,21 @@ static void spapr_machine_4_0_class_options(MachineClass 
*mc)
 
 DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
 
+static void spapr_machine_4_0_xive_instance_options(MachineState *machine)
+{
+spapr_machine_4_0_instance_options(machine);
+}
+
+static void spapr_machine_4_0_xive_class_options(MachineClass *mc)
+{
+sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc);
+
+spapr_machine_4_0_class_options(mc);
+smc->irq = &spapr_irq_xive;
+}
+
+DEFINE_SPAPR_MACHINE(4_0_xive, "4.0-xive", false);
+
 /*
  * pseries-3.1
  */
-- 
2.17.2