From: Aleksandar Markovic
Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct the order of argument comparisons in pickNaNMulAdd().
For more info, see [1], page 53, section "3.5.3 NaN Propagation".
[1] "MIPS Architecture for Programmers Volume IV-j:
The MIPS32 SIMD Architecture Module",
Imagination Technologies LTD, Revision 1.12, February 3, 2016
Reviewed-by: Leon Alrae
Signed-off-by: Aleksandar Markovic
---
fpu/softfloat-specialize.h | 41 +
1 file changed, 29 insertions(+), 12 deletions(-)
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index a1bcb46..4063561 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -571,19 +571,36 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag
bIsQNaN, flag bIsSNaN,
return 3;
}
-/* Prefer sNaN over qNaN, in the a, b, c order. */
-if (aIsSNaN) {
-return 0;
-} else if (bIsSNaN) {
-return 1;
-} else if (cIsSNaN) {
-return 2;
-} else if (aIsQNaN) {
-return 0;
-} else if (bIsQNaN) {
-return 1;
+if (status->snan_bit_is_one) {
+/* Prefer sNaN over qNaN, in the c, a, b order. */
+if (cIsSNaN) {
+return 2;
+} else if (aIsSNaN) {
+return 0;
+} else if (bIsSNaN) {
+return 1;
+} else if (cIsQNaN) {
+return 2;
+} else if (aIsQNaN) {
+return 0;
+} else {
+return 1;
+}
} else {
-return 2;
+/* Prefer sNaN over qNaN, in the a, b, c order. */
+if (aIsSNaN) {
+return 0;
+} else if (bIsSNaN) {
+return 1;
+} else if (cIsSNaN) {
+return 2;
+} else if (aIsQNaN) {
+return 0;
+} else if (bIsQNaN) {
+return 1;
+} else {
+return 2;
+}
}
}
#elif defined(TARGET_PPC)
--
1.9.1