Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Am 19.05.2014 15:03, schrieb Mark Cave-Ayland:
> On 08/05/14 15:34, Andreas Färber wrote:
>> Am 19.02.2014 22:39, schrieb Mark Cave-Ayland:
>>> On 19/02/14 13:35, Leandro Dorileo wrote:
> +static void cg3_realizefn(DeviceState *dev, Error **errp)
> +{
> +SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> +CG3State *s = CG3(dev);
> +int ret;
> +char *fcode_filename;
> +
> +/* FCode ROM */
> +memory_region_init_ram(&s->rom, NULL, "cg3.prom",
> FCODE_MAX_ROM_SIZE);
> +vmstate_register_ram_global(&s->rom);
> +memory_region_set_readonly(&s->rom, true);
> +sysbus_init_mmio(sbd,&s->rom);
> +
I think this initialization code could be done in a SysBusDeviceClass
init operation,
don't you think?
>>>
>>> I think it's possible since these MemoryRegions don't depend upon
>>> properties, but I leave that to Andres who seems reasonably happy with
>>> the patchset in its current form.
>>
>> memory_region_init_ram() and sysbus_init_mmio() could indeed be moved to
>> an .instance_init function, given that FCODE_MAX_ROM_SIZE is constant.
>> The others no. It makes a difference when considering reentrancy of the
>> property code via qom-set (just posted a patchset that makes playing
>> with that easier), although there's probably more corner cases to
>> consider. Could either of you follow up with a cleanup?
>
> Is something like this correct? It also seems that the register I/O
> region initialisation can get moved into the initfn since that doesn't
> depend on any properties either.
>
> If it looks good, I'll spin up a proper patchset that does the same to
> TCX too.
>
>
> --- a/hw/display/cg3.c
> +++ b/hw/display/cg3.c
> @@ -274,19 +274,30 @@ static const GraphicHwOps cg3_ops = {
> .gfx_update = cg3_update_display,
> };
>
> -static void cg3_realizefn(DeviceState *dev, Error **errp)
> +static void cg3_initfn(Object *obj)
> {
> -SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> -CG3State *s = CG3(dev);
> -int ret;
> -char *fcode_filename;
> +SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +CG3State *s = CG3(obj);
>
> /* FCode ROM */
> memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE);
> vmstate_register_ram_global(&s->rom);
This has global effects, so must stay in realize. The rest looks good.
Cheers,
Andreas
> memory_region_set_readonly(&s->rom, true);
> sysbus_init_mmio(sbd, &s->rom);
> +
> +memory_region_init_io(&s->reg, NULL, &cg3_reg_ops, s, "cg3.reg",
> + CG3_REG_SIZE);
> +sysbus_init_mmio(sbd, &s->reg);
> +}
>
> +static void cg3_realizefn(DeviceState *dev, Error **errp)
> +{
> +SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> +CG3State *s = CG3(dev);
> +int ret;
> +char *fcode_filename;
> +
> +/* FCode ROM */
> fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
> if (fcode_filename) {
> ret = load_image_targphys(fcode_filename, s->prom_addr,
> @@ -296,10 +307,6 @@ static void cg3_realizefn(DeviceState *dev, Error
> **errp)
> }
> }
>
> -memory_region_init_io(&s->reg, NULL, &cg3_reg_ops, s, "cg3.reg",
> - CG3_REG_SIZE);
> -sysbus_init_mmio(sbd, &s->reg);
> -
> memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size);
> vmstate_register_ram_global(&s->vram_mem);
> sysbus_init_mmio(sbd, &s->vram_mem);
> @@ -374,6 +381,7 @@ static const TypeInfo cg3_info = {
> .name = TYPE_CG3,
> .parent= TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(CG3State),
> +.instance_init = cg3_initfn,
> .class_init= cg3_class_init,
> };
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
On 08/05/14 15:34, Andreas Färber wrote:
Hi,
Am 19.02.2014 22:39, schrieb Mark Cave-Ayland:
On 19/02/14 13:35, Leandro Dorileo wrote:
Hi Leandro,
+static void cg3_realizefn(DeviceState *dev, Error **errp)
+{
+SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+CG3State *s = CG3(dev);
+int ret;
+char *fcode_filename;
+
+/* FCode ROM */
+memory_region_init_ram(&s->rom, NULL, "cg3.prom",
FCODE_MAX_ROM_SIZE);
+vmstate_register_ram_global(&s->rom);
+memory_region_set_readonly(&s->rom, true);
+sysbus_init_mmio(sbd,&s->rom);
+
I think this initialization code could be done in a SysBusDeviceClass
init operation,
don't you think?
I think it's possible since these MemoryRegions don't depend upon
properties, but I leave that to Andres who seems reasonably happy with
the patchset in its current form.
Just seeing this...
memory_region_init_ram() and sysbus_init_mmio() could indeed be moved to
an .instance_init function, given that FCODE_MAX_ROM_SIZE is constant.
The others no. It makes a difference when considering reentrancy of the
property code via qom-set (just posted a patchset that makes playing
with that easier), although there's probably more corner cases to
consider. Could either of you follow up with a cleanup?
Is something like this correct? It also seems that the register I/O
region initialisation can get moved into the initfn since that doesn't
depend on any properties either.
If it looks good, I'll spin up a proper patchset that does the same to
TCX too.
--- a/hw/display/cg3.c
+++ b/hw/display/cg3.c
@@ -274,19 +274,30 @@ static const GraphicHwOps cg3_ops = {
.gfx_update = cg3_update_display,
};
-static void cg3_realizefn(DeviceState *dev, Error **errp)
+static void cg3_initfn(Object *obj)
{
-SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
-CG3State *s = CG3(dev);
-int ret;
-char *fcode_filename;
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+CG3State *s = CG3(obj);
/* FCode ROM */
memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE);
vmstate_register_ram_global(&s->rom);
memory_region_set_readonly(&s->rom, true);
sysbus_init_mmio(sbd, &s->rom);
+
+memory_region_init_io(&s->reg, NULL, &cg3_reg_ops, s, "cg3.reg",
+ CG3_REG_SIZE);
+sysbus_init_mmio(sbd, &s->reg);
+}
+static void cg3_realizefn(DeviceState *dev, Error **errp)
+{
+SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+CG3State *s = CG3(dev);
+int ret;
+char *fcode_filename;
+
+/* FCode ROM */
fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
if (fcode_filename) {
ret = load_image_targphys(fcode_filename, s->prom_addr,
@@ -296,10 +307,6 @@ static void cg3_realizefn(DeviceState *dev, Error
**errp)
}
}
-memory_region_init_io(&s->reg, NULL, &cg3_reg_ops, s, "cg3.reg",
- CG3_REG_SIZE);
-sysbus_init_mmio(sbd, &s->reg);
-
memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size);
vmstate_register_ram_global(&s->vram_mem);
sysbus_init_mmio(sbd, &s->vram_mem);
@@ -374,6 +381,7 @@ static const TypeInfo cg3_info = {
.name = TYPE_CG3,
.parent= TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(CG3State),
+.instance_init = cg3_initfn,
.class_init= cg3_class_init,
};
ATB,
Mark.
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Il 08/05/2014 16:44, Mark Cave-Ayland ha scritto: +case CG3_REG_FBC_CURSTART ... CG3_REG_SIZE: +val = s->regs[addr - 0x10]; +break; +default: Something weird here, you can access regs[16] if addr == CG3_REG_SIZE. The same happens in the write path. Ping. I cannot fix it without access to the datasheet, though I suspect you want CG3_REG_SIZE - 1. Hi Paolo, Sorry I didn't think you could access regs[16] since the MemoryRegion size is set to CG3_REG_SIZE too (and so I hope should only handle accesses from 0 to CG3_REG_SIZE - 1). Anyway, I've quickly tried a Solaris 8 boot test replacing CG3_REG_SIZE with CG3_REG_SIZE - 1 for the case statements in both the read and write paths and everything still works, so happy for you to go ahead and fix it. Ah okay so it's a false positive. But yes, it's better to fix it. I'll try to send a patch for qemu-trivial. Paolo
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
On 07/05/14 20:56, Paolo Bonzini wrote:
Il 05/03/2014 11:05, Paolo Bonzini ha scritto:
Il 19/02/2014 10:05, Mark Cave-Ayland ha scritto:
+#define CG3_REG_SIZE0x20
+
+#define CG3_REG_FBC_CTRL0x10
+#define CG3_REG_FBC_STATUS 0x11
+#define CG3_REG_FBC_CURSTART0x12
+#define CG3_REG_FBC_CUREND 0x13
+#define CG3_REG_FBC_VCTRL 0x14
+
+typedef struct CG3State {
...
+uint8_t regs[16];
...
+case CG3_REG_FBC_CURSTART ... CG3_REG_SIZE:
+val = s->regs[addr - 0x10];
+break;
+default:
Something weird here, you can access regs[16] if addr == CG3_REG_SIZE.
The same happens in the write path.
Ping. I cannot fix it without access to the datasheet, though I suspect
you want CG3_REG_SIZE - 1.
Hi Paolo,
Sorry I didn't think you could access regs[16] since the MemoryRegion
size is set to CG3_REG_SIZE too (and so I hope should only handle
accesses from 0 to CG3_REG_SIZE - 1).
Anyway, I've quickly tried a Solaris 8 boot test replacing CG3_REG_SIZE
with CG3_REG_SIZE - 1 for the case statements in both the read and write
paths and everything still works, so happy for you to go ahead and fix it.
ATB,
Mark.
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Hi,
Am 19.02.2014 22:39, schrieb Mark Cave-Ayland:
> On 19/02/14 13:35, Leandro Dorileo wrote:
>
> Hi Leandro,
>
>>> +static void cg3_realizefn(DeviceState *dev, Error **errp)
>>> +{
>>> +SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>>> +CG3State *s = CG3(dev);
>>> +int ret;
>>> +char *fcode_filename;
>>> +
>>> +/* FCode ROM */
>>> +memory_region_init_ram(&s->rom, NULL, "cg3.prom",
>>> FCODE_MAX_ROM_SIZE);
>>> +vmstate_register_ram_global(&s->rom);
>>> +memory_region_set_readonly(&s->rom, true);
>>> +sysbus_init_mmio(sbd,&s->rom);
>>> +
>>
>>
>> I think this initialization code could be done in a SysBusDeviceClass
>> init operation,
>> don't you think?
>
> I think it's possible since these MemoryRegions don't depend upon
> properties, but I leave that to Andres who seems reasonably happy with
> the patchset in its current form.
Just seeing this...
memory_region_init_ram() and sysbus_init_mmio() could indeed be moved to
an .instance_init function, given that FCODE_MAX_ROM_SIZE is constant.
The others no. It makes a difference when considering reentrancy of the
property code via qom-set (just posted a patchset that makes playing
with that easier), although there's probably more corner cases to
consider. Could either of you follow up with a cleanup?
Regards,
Andreas
>>> +fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
>>> +if (fcode_filename) {
>>> +ret = load_image_targphys(fcode_filename, s->prom_addr,
>>> + FCODE_MAX_ROM_SIZE);
>>> +if (ret< 0 || ret> FCODE_MAX_ROM_SIZE) {
>>> +error_report("cg3: could not load prom '%s'",
>>> CG3_ROM_FILE);
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Il 05/03/2014 11:05, Paolo Bonzini ha scritto:
Il 19/02/2014 10:05, Mark Cave-Ayland ha scritto:
+#define CG3_REG_SIZE0x20
+
+#define CG3_REG_FBC_CTRL0x10
+#define CG3_REG_FBC_STATUS 0x11
+#define CG3_REG_FBC_CURSTART0x12
+#define CG3_REG_FBC_CUREND 0x13
+#define CG3_REG_FBC_VCTRL 0x14
+
+typedef struct CG3State {
...
+uint8_t regs[16];
...
+case CG3_REG_FBC_CURSTART ... CG3_REG_SIZE:
+val = s->regs[addr - 0x10];
+break;
+default:
Something weird here, you can access regs[16] if addr == CG3_REG_SIZE.
The same happens in the write path.
Ping. I cannot fix it without access to the datasheet, though I suspect
you want CG3_REG_SIZE - 1.
Paolo
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Il 19/02/2014 10:05, Mark Cave-Ayland ha scritto:
+#define CG3_REG_SIZE0x20
+
+#define CG3_REG_FBC_CTRL0x10
+#define CG3_REG_FBC_STATUS 0x11
+#define CG3_REG_FBC_CURSTART0x12
+#define CG3_REG_FBC_CUREND 0x13
+#define CG3_REG_FBC_VCTRL 0x14
+
+typedef struct CG3State {
...
+uint8_t regs[16];
...
+case CG3_REG_FBC_CURSTART ... CG3_REG_SIZE:
+val = s->regs[addr - 0x10];
+break;
+default:
Something weird here, you can access regs[16] if addr == CG3_REG_SIZE.
The same happens in the write path.
Paolo
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
On Wed, Feb 19, 2014 at 09:39:09PM +, Mark Cave-Ayland wrote:
> On 19/02/14 13:35, Leandro Dorileo wrote:
>
> Hi Leandro,
>
> >>+static void cg3_realizefn(DeviceState *dev, Error **errp)
> >>+{
> >>+SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
> >>+CG3State *s = CG3(dev);
> >>+int ret;
> >>+char *fcode_filename;
> >>+
> >>+/* FCode ROM */
> >>+memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE);
> >>+vmstate_register_ram_global(&s->rom);
> >>+memory_region_set_readonly(&s->rom, true);
> >>+sysbus_init_mmio(sbd,&s->rom);
> >>+
> >
> >
> >I think this initialization code could be done in a SysBusDeviceClass init
> >operation,
> >don't you think?
>
> I think it's possible since these MemoryRegions don't depend upon
> properties, but I leave that to Andres who seems reasonably happy with the
> patchset in its current form.
Yes, I just saw his comment in the patch 02...
>
> >
> >>+fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
> >>+if (fcode_filename) {
> >>+ret = load_image_targphys(fcode_filename, s->prom_addr,
> >>+ FCODE_MAX_ROM_SIZE);
> >>+if (ret< 0 || ret> FCODE_MAX_ROM_SIZE) {
> >>+error_report("cg3: could not load prom '%s'", CG3_ROM_FILE);
> >
> >
> >What happens if we fail to load the rom file? is the framebuffer supposed to
> >work?
>
> I guess the framebuffer would still "work" although nothing would be able to
> find its address because the node wouldn't exist in the device tree?
>
Ok, when we move this code to an instance init op we handle it a bit better.
>
> ATB,
>
> Mark.
--
Leandro Dorileo
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
On 19/02/14 13:35, Leandro Dorileo wrote:
Hi Leandro,
+static void cg3_realizefn(DeviceState *dev, Error **errp)
+{
+SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+CG3State *s = CG3(dev);
+int ret;
+char *fcode_filename;
+
+/* FCode ROM */
+memory_region_init_ram(&s->rom, NULL, "cg3.prom", FCODE_MAX_ROM_SIZE);
+vmstate_register_ram_global(&s->rom);
+memory_region_set_readonly(&s->rom, true);
+sysbus_init_mmio(sbd,&s->rom);
+
I think this initialization code could be done in a SysBusDeviceClass init
operation,
don't you think?
I think it's possible since these MemoryRegions don't depend upon
properties, but I leave that to Andres who seems reasonably happy with
the patchset in its current form.
+fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE);
+if (fcode_filename) {
+ret = load_image_targphys(fcode_filename, s->prom_addr,
+ FCODE_MAX_ROM_SIZE);
+if (ret< 0 || ret> FCODE_MAX_ROM_SIZE) {
+error_report("cg3: could not load prom '%s'", CG3_ROM_FILE);
What happens if we fail to load the rom file? is the framebuffer supposed to
work?
I guess the framebuffer would still "work" although nothing would be
able to find its address because the node wouldn't exist in the device tree?
ATB,
Mark.
Re: [Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Hi Mark,
On Wed, Feb 19, 2014 at 09:05:19AM +, Mark Cave-Ayland wrote:
> The CG3 framebuffer is a simple 8-bit framebuffer for use with operating
> systems such as early Solaris that do not have drivers for TCX.
>
> Signed-off-by: Mark Cave-Ayland
> CC: Blue Swirl
> CC: Anthony Liguori
> CC: Peter Maydell
> CC: Bob Breuer
> CC: Artyom Tarasenko
> ---
> Makefile |2 +-
> default-configs/sparc-softmmu.mak |1 +
> hw/display/Makefile.objs |1 +
> hw/display/cg3.c | 384
> +
> pc-bios/QEMU,cgthree.bin | Bin 0 -> 850 bytes
> pc-bios/README|4 +-
> 6 files changed, 389 insertions(+), 3 deletions(-)
> create mode 100644 hw/display/cg3.c
> create mode 100644 pc-bios/QEMU,cgthree.bin
>
> diff --git a/Makefile b/Makefile
> index 807054b..c3c7ccc 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -293,7 +293,7 @@ ifdef INSTALL_BLOBS
> BLOBS=bios.bin bios-256k.bin sgabios.bin vgabios.bin vgabios-cirrus.bin \
> vgabios-stdvga.bin vgabios-vmware.bin vgabios-qxl.bin \
> acpi-dsdt.aml q35-acpi-dsdt.aml \
> -ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin \
> +ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin
> QEMU,cgthree.bin \
> pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
> pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
> efi-e1000.rom efi-eepro100.rom efi-ne2k_pci.rom \
> diff --git a/default-configs/sparc-softmmu.mak
> b/default-configs/sparc-softmmu.mak
> index 8fc93dd..ab796b3 100644
> --- a/default-configs/sparc-softmmu.mak
> +++ b/default-configs/sparc-softmmu.mak
> @@ -10,6 +10,7 @@ CONFIG_EMPTY_SLOT=y
> CONFIG_PCNET_COMMON=y
> CONFIG_LANCE=y
> CONFIG_TCX=y
> +CONFIG_CG3=y
> CONFIG_SLAVIO=y
> CONFIG_CS4231=y
> CONFIG_GRLIB=y
> diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs
> index 540df82..7ed76a9 100644
> --- a/hw/display/Makefile.objs
> +++ b/hw/display/Makefile.objs
> @@ -28,6 +28,7 @@ obj-$(CONFIG_OMAP) += omap_lcdc.o
> obj-$(CONFIG_PXA2XX) += pxa2xx_lcd.o
> obj-$(CONFIG_SM501) += sm501.o
> obj-$(CONFIG_TCX) += tcx.o
> +obj-$(CONFIG_CG3) += cg3.o
>
> obj-$(CONFIG_VGA) += vga.o
>
> diff --git a/hw/display/cg3.c b/hw/display/cg3.c
> new file mode 100644
> index 000..b6bc0c2
> --- /dev/null
> +++ b/hw/display/cg3.c
> @@ -0,0 +1,384 @@
> +/*
> + * QEMU CG3 Frame buffer
> + *
> + * Copyright (c) 2012 Bob Breuer
> + * Copyright (c) 2013 Mark Cave-Ayland
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> copy
> + * of this software and associated documentation files (the "Software"), to
> deal
> + * in the Software without restriction, including without limitation the
> rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#include "qemu-common.h"
> +#include "qemu/error-report.h"
> +#include "ui/console.h"
> +#include "hw/sysbus.h"
> +#include "hw/loader.h"
> +
> +/* Change to 1 to enable debugging */
> +#define DEBUG_CG3 0
> +
> +#define CG3_ROM_FILE "QEMU,cgthree.bin"
> +#define FCODE_MAX_ROM_SIZE 0x1
> +
> +#define CG3_REG_SIZE0x20
> +
> +#define CG3_REG_BT458_ADDR 0x0
> +#define CG3_REG_BT458_COLMAP0x4
> +#define CG3_REG_FBC_CTRL0x10
> +#define CG3_REG_FBC_STATUS 0x11
> +#define CG3_REG_FBC_CURSTART0x12
> +#define CG3_REG_FBC_CUREND 0x13
> +#define CG3_REG_FBC_VCTRL 0x14
> +
> +/* Control register flags */
> +#define CG3_CR_ENABLE_INTS 0x80
> +
> +/* Status register flags */
> +#define CG3_SR_PENDING_INT 0x80
> +#define CG3_SR_1152_900_76_B0x60
> +#define CG3_SR_ID_COLOR 0x01
> +
> +#define CG3_VRAM_SIZE 0x10
> +#define CG3_VRAM_OFFSET 0x80
> +
> +#define DPRINTF(fmt, ...) do { \
> +if (DEBUG_CG3) { \
> +printf("CG3: " fmt , ## __VA_ARGS__); \
> +} \
> +} while (0);
> +
> +#define TYPE_CG3 "cgthree"
> +#define CG3(obj) OBJECT_CHECK(CG3State, (obj), TYPE_CG3)
> +
> +typedef struct CG3State {
> +SysBusDevice parent_obj;
> +
> +QemuConsole *con;
> +qemu_irq irq;
> +hwaddr prom_addr;
> +MemoryRe
[Qemu-devel] [PATCHv3 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
The CG3 framebuffer is a simple 8-bit framebuffer for use with operating
systems such as early Solaris that do not have drivers for TCX.
Signed-off-by: Mark Cave-Ayland
CC: Blue Swirl
CC: Anthony Liguori
CC: Peter Maydell
CC: Bob Breuer
CC: Artyom Tarasenko
---
Makefile |2 +-
default-configs/sparc-softmmu.mak |1 +
hw/display/Makefile.objs |1 +
hw/display/cg3.c | 384 +
pc-bios/QEMU,cgthree.bin | Bin 0 -> 850 bytes
pc-bios/README|4 +-
6 files changed, 389 insertions(+), 3 deletions(-)
create mode 100644 hw/display/cg3.c
create mode 100644 pc-bios/QEMU,cgthree.bin
diff --git a/Makefile b/Makefile
index 807054b..c3c7ccc 100644
--- a/Makefile
+++ b/Makefile
@@ -293,7 +293,7 @@ ifdef INSTALL_BLOBS
BLOBS=bios.bin bios-256k.bin sgabios.bin vgabios.bin vgabios-cirrus.bin \
vgabios-stdvga.bin vgabios-vmware.bin vgabios-qxl.bin \
acpi-dsdt.aml q35-acpi-dsdt.aml \
-ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin \
+ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin
QEMU,cgthree.bin \
pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
efi-e1000.rom efi-eepro100.rom efi-ne2k_pci.rom \
diff --git a/default-configs/sparc-softmmu.mak
b/default-configs/sparc-softmmu.mak
index 8fc93dd..ab796b3 100644
--- a/default-configs/sparc-softmmu.mak
+++ b/default-configs/sparc-softmmu.mak
@@ -10,6 +10,7 @@ CONFIG_EMPTY_SLOT=y
CONFIG_PCNET_COMMON=y
CONFIG_LANCE=y
CONFIG_TCX=y
+CONFIG_CG3=y
CONFIG_SLAVIO=y
CONFIG_CS4231=y
CONFIG_GRLIB=y
diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs
index 540df82..7ed76a9 100644
--- a/hw/display/Makefile.objs
+++ b/hw/display/Makefile.objs
@@ -28,6 +28,7 @@ obj-$(CONFIG_OMAP) += omap_lcdc.o
obj-$(CONFIG_PXA2XX) += pxa2xx_lcd.o
obj-$(CONFIG_SM501) += sm501.o
obj-$(CONFIG_TCX) += tcx.o
+obj-$(CONFIG_CG3) += cg3.o
obj-$(CONFIG_VGA) += vga.o
diff --git a/hw/display/cg3.c b/hw/display/cg3.c
new file mode 100644
index 000..b6bc0c2
--- /dev/null
+++ b/hw/display/cg3.c
@@ -0,0 +1,384 @@
+/*
+ * QEMU CG3 Frame buffer
+ *
+ * Copyright (c) 2012 Bob Breuer
+ * Copyright (c) 2013 Mark Cave-Ayland
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu-common.h"
+#include "qemu/error-report.h"
+#include "ui/console.h"
+#include "hw/sysbus.h"
+#include "hw/loader.h"
+
+/* Change to 1 to enable debugging */
+#define DEBUG_CG3 0
+
+#define CG3_ROM_FILE "QEMU,cgthree.bin"
+#define FCODE_MAX_ROM_SIZE 0x1
+
+#define CG3_REG_SIZE0x20
+
+#define CG3_REG_BT458_ADDR 0x0
+#define CG3_REG_BT458_COLMAP0x4
+#define CG3_REG_FBC_CTRL0x10
+#define CG3_REG_FBC_STATUS 0x11
+#define CG3_REG_FBC_CURSTART0x12
+#define CG3_REG_FBC_CUREND 0x13
+#define CG3_REG_FBC_VCTRL 0x14
+
+/* Control register flags */
+#define CG3_CR_ENABLE_INTS 0x80
+
+/* Status register flags */
+#define CG3_SR_PENDING_INT 0x80
+#define CG3_SR_1152_900_76_B0x60
+#define CG3_SR_ID_COLOR 0x01
+
+#define CG3_VRAM_SIZE 0x10
+#define CG3_VRAM_OFFSET 0x80
+
+#define DPRINTF(fmt, ...) do { \
+if (DEBUG_CG3) { \
+printf("CG3: " fmt , ## __VA_ARGS__); \
+} \
+} while (0);
+
+#define TYPE_CG3 "cgthree"
+#define CG3(obj) OBJECT_CHECK(CG3State, (obj), TYPE_CG3)
+
+typedef struct CG3State {
+SysBusDevice parent_obj;
+
+QemuConsole *con;
+qemu_irq irq;
+hwaddr prom_addr;
+MemoryRegion vram_mem;
+MemoryRegion rom;
+MemoryRegion reg;
+uint32_t vram_size;
+int full_update;
+uint8_t regs[16];
+uint8_t r[256], g[256], b[256];
+uint16_t width, height, depth;
+uint8_t dac_index, dac_state;
+} CG3State;
+
+static void cg3_update_display(void *opaque)
+{
+CG3State *s = opaque;
+DisplaySurface *surface = qemu_c
