Re: [Qemu-devel] [PULL 0/5] target-arm queue

2019-07-26 Thread Peter Maydell 
On Fri, 26 Jul 2019 at 16:19, Peter Maydell  wrote:
>
> Handful of bug fixes to sneak in before rc3.
>
> thanks
> -- PMM
>
> The following changes since commit c985266ea5b50e46e07b3568c1346e10064205c9:
>
>   Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190726' into 
> staging (2019-07-26 13:52:06 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20190726
>
> for you to fetch changes up to 67505c114e6acc26f3a1a2b74833c61b6a34ff95:
>
>   hw/arm/boot: Further improve initrd positioning code (2019-07-26 16:17:56 
> +0100)
>
> 
> target-arm queue:
>  * Fix broken migration on pl330 device
>  * Fix broken migration on stellaris-input device
>  * Add type checks to vmstate varry macros to avoid this class of bugs
>  * hw/arm/boot: Fix some remaining cases where we would put the
>initrd on top of the kernel image
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue

2019-07-26 Thread Peter Maydell 
Handful of bug fixes to sneak in before rc3.

thanks
-- PMM

The following changes since commit c985266ea5b50e46e07b3568c1346e10064205c9:

  Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190726' into 
staging (2019-07-26 13:52:06 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20190726

for you to fetch changes up to 67505c114e6acc26f3a1a2b74833c61b6a34ff95:

  hw/arm/boot: Further improve initrd positioning code (2019-07-26 16:17:56 
+0100)


target-arm queue:
 * Fix broken migration on pl330 device
 * Fix broken migration on stellaris-input device
 * Add type checks to vmstate varry macros to avoid this class of bugs
 * hw/arm/boot: Fix some remaining cases where we would put the
   initrd on top of the kernel image


Damien Hedde (1):
  pl330: fix vmstate description

Peter Maydell (4):
  stellaris_input: Fix vmstate description of buttons field
  vmstate.h: Type check VMSTATE_STRUCT_VARRAY macros
  hw/arm/boot: Rename elf_{low, high}_addr to image_{low, high}_addr
  hw/arm/boot: Further improve initrd positioning code

 include/migration/vmstate.h | 30 --
 hw/arm/boot.c   | 37 +++--
 hw/dma/pl330.c  | 17 +
 hw/input/stellaris_input.c  | 10 ++
 4 files changed, 66 insertions(+), 28 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2019-07-22 Thread Peter Maydell 
On Mon, 22 Jul 2019 at 14:14, Peter Maydell  wrote:
>
> target-arm queue for rc2. This has 3 Arm related bug fixes,
> and a couple of non-arm patches which don't have an obviously
> better route into the tree.
>
> thanks
> -- PMM
>
> The following changes since commit b9e02bb3f98174209dbd5c96858e65a31723221b:
>
>   Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-07-19' into 
> staging (2019-07-22 10:11:28 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20190722
>
> for you to fetch changes up to ddb45afbfbc639365d6c934e4e29f6de5e5e2a0e:
>
>   contrib/elf2dmp: Build download.o with CURL_CFLAGS (2019-07-22 14:07:39 
> +0100)
>
> 
> target-arm queue:
>  * target/arm: Add missing break statement for Hypervisor Trap Exception
>(fixes handling of SMC insn taken to AArch32 Hyp mode via HCR.TSC)
>  * hw/arm/fsl-imx6ul.c: Remove dead SMP-related code
>  * target/arm: Limit ID register assertions to TCG
>  * configure: Clarify URL to source downloads
>  * contrib/elf2dmp: Build download.o with CURL_CFLAGS
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue

2019-07-22 Thread Peter Maydell 
target-arm queue for rc2. This has 3 Arm related bug fixes,
and a couple of non-arm patches which don't have an obviously
better route into the tree.

thanks
-- PMM

The following changes since commit b9e02bb3f98174209dbd5c96858e65a31723221b:

  Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-07-19' into 
staging (2019-07-22 10:11:28 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20190722

for you to fetch changes up to ddb45afbfbc639365d6c934e4e29f6de5e5e2a0e:

  contrib/elf2dmp: Build download.o with CURL_CFLAGS (2019-07-22 14:07:39 +0100)


target-arm queue:
 * target/arm: Add missing break statement for Hypervisor Trap Exception
   (fixes handling of SMC insn taken to AArch32 Hyp mode via HCR.TSC)
 * hw/arm/fsl-imx6ul.c: Remove dead SMP-related code
 * target/arm: Limit ID register assertions to TCG
 * configure: Clarify URL to source downloads
 * contrib/elf2dmp: Build download.o with CURL_CFLAGS


Peter Maydell (4):
  hw/arm/fsl-imx6ul.c: Remove dead SMP-related code
  target/arm: Limit ID register assertions to TCG
  configure: Clarify URL to source downloads
  contrib/elf2dmp: Build download.o with CURL_CFLAGS

Philippe Mathieu-Daudé (1):
  target/arm: Add missing break statement for Hypervisor Trap Exception

 configure |  2 +-
 Makefile  |  1 -
 contrib/elf2dmp/Makefile.objs |  3 +++
 include/hw/arm/fsl-imx6ul.h   |  2 +-
 hw/arm/fsl-imx6ul.c   | 62 +--
 hw/arm/mcimx6ul-evk.c |  2 +-
 target/arm/cpu.c  |  7 +++--
 target/arm/helper.c   |  1 +
 8 files changed, 30 insertions(+), 50 deletions(-)

[Qemu-devel] [PULL 0/5] target-arm queue

2019-03-15 Thread Peter Maydell 


A last arm pullreq before rc0. This is mostly bug fixes,
though you could call adding the missing local timer
support to bcm2836_control a new feature I suppose --
in any case it's a small and localised change.

thanks
-- PMM

The following changes since commit 7074ab12c81a1b2b1e0e1c40983f56b2c5ccc494:

  Merge remote-tracking branch 
'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-03-14 
16:19:37 +)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20190315

for you to fetch changes up to 5de56742a3c91de3d646326bec43a989bba83ca4:

  target/arm: Check access permission to ADDVL/ADDPL/RDVL (2019-03-15 11:12:29 
+)


target-arm queue:
 * Add missing SVE-enabled check to ADDVL/ADDPL/RDVL
 * virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
 * virt-acpi-build: Fix SMMUv3 GSIV values
 * Allow EL0 to write to arch timer registers, not just read them
 * bcm2836_control: Implement local timer


Amir Charif (1):
  target/arm: Check access permission to ADDVL/ADDPL/RDVL

Dongjiu Geng (1):
  target/arm: change arch timer registers access permission

Eric Auger (1):
  hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

Wei Yang (1):
  hw/arm/virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number

Zoltán Baldaszti (1):
  hw/intc/bcm2836_control: Implement local timer

 include/hw/intc/bcm2836_control.h |   9 
 hw/arm/virt-acpi-build.c  |   6 +--
 hw/intc/bcm2836_control.c | 101 +-
 target/arm/helper.c   |  30 +--
 target/arm/translate-sve.c|  22 ++---
 5 files changed, 140 insertions(+), 28 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2019-03-15 Thread Peter Maydell 
On Fri, 15 Mar 2019 at 11:39, Peter Maydell  wrote:
>
>
> A last arm pullreq before rc0. This is mostly bug fixes,
> though you could call adding the missing local timer
> support to bcm2836_control a new feature I suppose --
> in any case it's a small and localised change.
>
> thanks
> -- PMM
>
> The following changes since commit 7074ab12c81a1b2b1e0e1c40983f56b2c5ccc494:
>
>   Merge remote-tracking branch 
> 'remotes/vivier2/tags/trivial-branch-pull-request' into staging (2019-03-14 
> 16:19:37 +)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20190315
>
> for you to fetch changes up to 5de56742a3c91de3d646326bec43a989bba83ca4:
>
>   target/arm: Check access permission to ADDVL/ADDPL/RDVL (2019-03-15 
> 11:12:29 +)
>
> 
> target-arm queue:
>  * Add missing SVE-enabled check to ADDVL/ADDPL/RDVL
>  * virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
>  * virt-acpi-build: Fix SMMUv3 GSIV values
>  * Allow EL0 to write to arch timer registers, not just read them
>  * bcm2836_control: Implement local timer
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.

-- PMM

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2018-11-06 Thread Peter Maydell 
On 6 November 2018 at 11:38, Peter Maydell  wrote:
> Handful of bugfix patches for arm for rc0; also
> one milkymist patch, thrown in since I was putting
> the pullreq together anyway.
>
> thanks
> -- PMM
>
> The following changes since commit 03c1ca1c51783603d42eb0f91d35961f0f4b4947:
>
>   Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20181105' into 
> staging (2018-11-06 09:10:46 +)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20181106
>
> for you to fetch changes up to 23463e0e4aeb2f0a9c60549a2c163f4adc0b8512:
>
>   target/arm: Fix ATS1Hx instructions (2018-11-06 11:32:14 +)
>
> 
> target-arm queue:
>  * Remove can't-happen if() from handle_vec_simd_shli()
>  * hw/arm/exynos4210: Zero memory allocated for Exynos4210State
>  * Set S and PTW in 64-bit PAR format
>  * Fix ATS1Hx instructions
>  * milkymist: Check for failure trying to load BIOS image
>

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue

2018-11-06 Thread Peter Maydell 
Handful of bugfix patches for arm for rc0; also
one milkymist patch, thrown in since I was putting
the pullreq together anyway.

thanks
-- PMM

The following changes since commit 03c1ca1c51783603d42eb0f91d35961f0f4b4947:

  Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20181105' into 
staging (2018-11-06 09:10:46 +)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20181106

for you to fetch changes up to 23463e0e4aeb2f0a9c60549a2c163f4adc0b8512:

  target/arm: Fix ATS1Hx instructions (2018-11-06 11:32:14 +)


target-arm queue:
 * Remove can't-happen if() from handle_vec_simd_shli()
 * hw/arm/exynos4210: Zero memory allocated for Exynos4210State
 * Set S and PTW in 64-bit PAR format
 * Fix ATS1Hx instructions
 * milkymist: Check for failure trying to load BIOS image


Peter Maydell (5):
  target/arm: Remove can't-happen if() from handle_vec_simd_shli()
  milkymist: Check for failure trying to load BIOS image
  hw/arm/exynos4210: Zero memory allocated for Exynos4210State
  target/arm: Set S and PTW in 64-bit PAR format
  target/arm: Fix ATS1Hx instructions

 hw/arm/exynos4210.c|  2 +-
 hw/lm32/milkymist.c|  5 -
 target/arm/helper.c| 14 --
 target/arm/translate-a64.c |  8 +++-
 4 files changed, 16 insertions(+), 13 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2018-07-23 Thread Peter Maydell 
On 23 July 2018 at 15:41, Peter Maydell  wrote:
> target-arm queue for 3.0:
>
> Thomas' fixes for instrospection issues with a handful of
> devices (including one microblaze one that I include in this
> pullreq for convenience's sake), plus my bugfix for a
> corner case of small MPU region support.
>
> thanks
> -- PMM
>
> The following changes since commit 55b1f14cefcb19ce6d5e28c4c83404230888aa7e:
>
>   Merge remote-tracking branch 
> 'remotes/vivier2/tags/linux-user-for-3.0-pull-request' into staging 
> (2018-07-23 14:03:14 +0100)
>
> are available in the Git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20180723
>
> for you to fetch changes up to 1ddc9b98c3cb89fe23a55ba924000fd645253e87:
>
>   hw/intc/exynos4210_gic: Turn instance_init into realize function 
> (2018-07-23 15:21:27 +0100)
>
> 
> target-arm queue:
>  * spitz, exynos: fix bugs when introspecting some devices
>  * hw/microblaze/xlnx-zynqmp-pmu: Fix introspection problem in 'xlnx, 
> zynqmp-pmu-soc'
>  * target/arm: Correctly handle overlapping small MPU regions
>  * hw/sd/bcm2835_sdhost: Fix PIO mode writes
>

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue

2018-07-23 Thread Peter Maydell 
target-arm queue for 3.0:

Thomas' fixes for instrospection issues with a handful of
devices (including one microblaze one that I include in this
pullreq for convenience's sake), plus my bugfix for a
corner case of small MPU region support.

thanks
-- PMM

The following changes since commit 55b1f14cefcb19ce6d5e28c4c83404230888aa7e:

  Merge remote-tracking branch 
'remotes/vivier2/tags/linux-user-for-3.0-pull-request' into staging (2018-07-23 
14:03:14 +0100)

are available in the Git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20180723

for you to fetch changes up to 1ddc9b98c3cb89fe23a55ba924000fd645253e87:

  hw/intc/exynos4210_gic: Turn instance_init into realize function (2018-07-23 
15:21:27 +0100)


target-arm queue:
 * spitz, exynos: fix bugs when introspecting some devices
 * hw/microblaze/xlnx-zynqmp-pmu: Fix introspection problem in 'xlnx, 
zynqmp-pmu-soc'
 * target/arm: Correctly handle overlapping small MPU regions
 * hw/sd/bcm2835_sdhost: Fix PIO mode writes


Guenter Roeck (1):
  hw/sd/bcm2835_sdhost: Fix PIO mode writes

Peter Maydell (1):
  target/arm: Correctly handle overlapping small MPU regions

Thomas Huth (3):
  hw/microblaze/xlnx-zynqmp-pmu: Fix introspection problem in 'xlnx, 
zynqmp-pmu-soc'
  hw/arm/spitz: Move problematic nand_init() code to realize function
  hw/intc/exynos4210_gic: Turn instance_init into realize function

 hw/arm/spitz.c  | 15 ++
 hw/intc/exynos4210_gic.c|  6 +++---
 hw/microblaze/xlnx-zynqmp-pmu.c | 10 -
 hw/sd/bcm2835_sdhost.c  | 20 ++
 target/arm/helper.c | 46 +
 5 files changed, 80 insertions(+), 17 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue for rc2

2017-11-21 Thread Peter Maydell 
On 20 November 2017 at 17:37, Peter Maydell  wrote:
> A small set of bugfixes for rc2. (Some are patches I
> should have put into rc1 but forgot about; oops.)
>
> thanks
> -- PMM
>
>
> The following changes since commit b11ce33fe0266f8ede18cfcf961536f6a209b02b:
>
>   Revert "cpu-exec: don't overwrite exception_index" (2017-11-20 10:58:27 
> +)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20171120
>
> for you to fetch changes up to b350ae138fcb062f49904f5115cc5fe188a02906:
>
>   hw/arm: Silence xlnx-ep108 deprecation warning during tests (2017-11-20 
> 13:48:27 +)
>
> 
> target-arm queue:
>  * hw/arm: Silence xlnx-ep108 deprecation warning during tests
>  * hw/arm/aspeed: Unlock SCU when running kernel
>  * arm: check regime, not current state, for ATS write PAR format
>  * nvic: Fix ARMv7M MPU_RBAR reads
>  * target/arm: Report GICv3 sysregs present in ID registers if needed
>
> 
> Joel Stanley (1):
>   hw/arm/aspeed: Unlock SCU when running kernel
>
> Peter Maydell (3):
>   target/arm: Report GICv3 sysregs present in ID registers if needed
>   nvic: Fix ARMv7M MPU_RBAR reads
>   arm: check regime, not current state, for ATS write PAR format
>
> Thomas Huth (1):
>   hw/arm: Silence xlnx-ep108 deprecation warning during tests

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue for rc2

2017-11-20 Thread Peter Maydell 
A small set of bugfixes for rc2. (Some are patches I
should have put into rc1 but forgot about; oops.)

thanks
-- PMM


The following changes since commit b11ce33fe0266f8ede18cfcf961536f6a209b02b:

  Revert "cpu-exec: don't overwrite exception_index" (2017-11-20 10:58:27 +)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20171120

for you to fetch changes up to b350ae138fcb062f49904f5115cc5fe188a02906:

  hw/arm: Silence xlnx-ep108 deprecation warning during tests (2017-11-20 
13:48:27 +)


target-arm queue:
 * hw/arm: Silence xlnx-ep108 deprecation warning during tests
 * hw/arm/aspeed: Unlock SCU when running kernel
 * arm: check regime, not current state, for ATS write PAR format
 * nvic: Fix ARMv7M MPU_RBAR reads
 * target/arm: Report GICv3 sysregs present in ID registers if needed


Joel Stanley (1):
  hw/arm/aspeed: Unlock SCU when running kernel

Peter Maydell (3):
  target/arm: Report GICv3 sysregs present in ID registers if needed
  nvic: Fix ARMv7M MPU_RBAR reads
  arm: check regime, not current state, for ATS write PAR format

Thomas Huth (1):
  hw/arm: Silence xlnx-ep108 deprecation warning during tests

 include/hw/misc/aspeed_scu.h |  3 +++
 hw/arm/aspeed.c  |  9 +
 hw/arm/aspeed_soc.c  |  2 ++
 hw/arm/xlnx-zcu102.c |  7 +--
 hw/intc/armv7m_nvic.c|  2 +-
 hw/misc/aspeed_scu.c |  5 +++--
 target/arm/helper.c  | 46 +++-
 7 files changed, 64 insertions(+), 10 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2017-10-31 Thread Peter Maydell 
On 31 October 2017 at 13:11, Peter Maydell  wrote:
> Just small stuff. I expect/hope to get the "report attributes
> in PAR register" fix from Andrew in, but will either send another
> pull or just apply it as a single patch once it's been reviewed.
> (I think we can call it a bugfix anyway, since it fixes booting
> of Windows on ARM.)
>
> thanks
> -- PMM
>
>
> The following changes since commit abf6e752e55b2f5afb48303429dea2db7c3a62de:
>
>   Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20171030' into 
> staging (2017-10-30 13:02:45 +)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20171031
>
> for you to fetch changes up to 168df2dea701bbf3118bdfea7794369dfa694d3d:
>
>   hw/pci-host/gpex: Improve INTX to gsi routing error checking (2017-10-31 
> 11:50:52 +)
>
> 
> target-arm queue:
>  * fix instruction-length bit in syndrome for WFI/WFE traps
>  * xlnx-zcu102: Specify the max number of CPUs
>  * msf2: Remove dead code reported by Coverity
>  * msf2: Wire up SYSRESETREQ in SoC for system reset
>  * hw/pci-host/gpex: Improve INTX to gsi routing error checking
>


Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue

2017-10-31 Thread Peter Maydell 
Just small stuff. I expect/hope to get the "report attributes
in PAR register" fix from Andrew in, but will either send another
pull or just apply it as a single patch once it's been reviewed.
(I think we can call it a bugfix anyway, since it fixes booting
of Windows on ARM.)

thanks
-- PMM


The following changes since commit abf6e752e55b2f5afb48303429dea2db7c3a62de:

  Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20171030' into 
staging (2017-10-30 13:02:45 +)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20171031

for you to fetch changes up to 168df2dea701bbf3118bdfea7794369dfa694d3d:

  hw/pci-host/gpex: Improve INTX to gsi routing error checking (2017-10-31 
11:50:52 +)


target-arm queue:
 * fix instruction-length bit in syndrome for WFI/WFE traps
 * xlnx-zcu102: Specify the max number of CPUs
 * msf2: Remove dead code reported by Coverity
 * msf2: Wire up SYSRESETREQ in SoC for system reset
 * hw/pci-host/gpex: Improve INTX to gsi routing error checking


Alistair Francis (1):
  xlnx-zcu102: Specify the max number of CPUs

Eric Auger (1):
  hw/pci-host/gpex: Improve INTX to gsi routing error checking

Stefano Stabellini (1):
  fix WFI/WFE length in syndrome register

Subbaraya Sundeep (2):
  msf2: Remove dead code reported by Coverity
  msf2: Wire up SYSRESETREQ in SoC for system reset

 target/arm/helper.h|  2 +-
 target/arm/internals.h |  3 ++-
 hw/arm/msf2-soc.c  | 11 +++
 hw/arm/xlnx-zcu102.c   |  1 +
 hw/pci-host/gpex.c | 10 --
 hw/ssi/mss-spi.c   | 18 ++
 target/arm/op_helper.c |  7 ---
 target/arm/psci.c  |  2 +-
 target/arm/translate-a64.c |  7 ++-
 target/arm/translate.c | 10 +-
 10 files changed, 57 insertions(+), 14 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2016-04-05 Thread Peter Maydell 
On 4 April 2016 at 17:43, Peter Maydell  wrote:
> ARM changes for rc1: a small set of bugfixes which didn't quite
> make rc0, mostly.
>
> thanks
> -- PMM
>
>
> The following changes since commit c40e13e106243a6798b7b02b4d7de5ff6c9be128:
>
>   bsd-user: add necessary includes to fix warnings (2016-04-04 16:17:18 +0100)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20160404
>
> for you to fetch changes up to bf06c1123a427fefc2cf9cf8019578eafc19eb6f:
>
>   target-arm: Make the 64-bit version of VTCR do the migration (2016-04-04 
> 17:33:52 +0100)
>
> 
> target-arm queue:
>  * bcm2836: wire up CPU timer interrupts correctly
>  * linux-user: ignore EXCP_YIELD in ARM cpu_loop()
>  * target-arm: correctly reset SCTLR_EL3
>  * target-arm: remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3
>  * target-arm: make the 64-bit version of VTCR do the migration
>

Applied, thanks.

-- PMM

[Qemu-devel] [PULL 0/5] target-arm queue

2016-04-04 Thread Peter Maydell 
ARM changes for rc1: a small set of bugfixes which didn't quite
make rc0, mostly.

thanks
-- PMM


The following changes since commit c40e13e106243a6798b7b02b4d7de5ff6c9be128:

  bsd-user: add necessary includes to fix warnings (2016-04-04 16:17:18 +0100)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20160404

for you to fetch changes up to bf06c1123a427fefc2cf9cf8019578eafc19eb6f:

  target-arm: Make the 64-bit version of VTCR do the migration (2016-04-04 
17:33:52 +0100)


target-arm queue:
 * bcm2836: wire up CPU timer interrupts correctly
 * linux-user: ignore EXCP_YIELD in ARM cpu_loop()
 * target-arm: correctly reset SCTLR_EL3
 * target-arm: remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3
 * target-arm: make the 64-bit version of VTCR do the migration


Peter Maydell (5):
  hw/arm/bcm2836: Wire up CPU timer interrupts correctly
  linux-user: arm: Handle (ignore) EXCP_YIELD in ARM cpu_loop()
  target-arm: Correctly reset SCTLR_EL3 for 64-bit CPUs
  target-arm: Remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3
  target-arm: Make the 64-bit version of VTCR do the migration

 hw/arm/bcm2836.c|  6 +-
 linux-user/main.c   |  6 ++
 target-arm/helper.c | 31 ++-
 3 files changed, 29 insertions(+), 14 deletions(-)

[Qemu-devel] [PULL 0/5] target-arm queue

2016-01-11 Thread Peter Maydell 
Not very many patches here, but no point holding on to them.
I'm not going to email out the libvixl upgrade patch because
it's so big it'd get blocked by the list server anyway.

thanks
-- PMM


The following changes since commit 692a5519ab1510ff48bdde9701017b9425643058:

  Merge remote-tracking branch 
'remotes/mjt/tags/pull-trivial-patches-2016-01-11' into staging (2016-01-11 
12:56:58 +)

are available in the git repository at:


  git://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20160111

for you to fetch changes up to fe84fe5e2a59d5e83f043226114153bd3ccb1c51:

  hw/arm/virt: Support legacy -nic command line syntax (2016-01-11 14:23:03 
+)


target-arm queue:
 * i.MX: move i.MX31 CCM object to register array
 * xilinx_axidma: remove dead code
 * xlnx-zynqmp: Add support for high DDR memory regions
 * disas/libvixl: Update to upstream VIXL 1.12
 * virt: Support legacy -nic command line syntax


Alistair Francis (1):
  xlnx-zynqmp: Add support for high DDR memory regions

Andrew Jones (1):
  hw/dma/xilinx_axidma: remove dead code

Ashok Kumar (1):
  hw/arm/virt: Support legacy -nic command line syntax

Jean-Christophe DUBOIS (1):
  i.MX: move i.MX31 CCM object to register array

Peter Maydell (1):
  disas/libvixl: Update to upstream VIXL 1.12

 disas/arm-a64.cc   |2 +-
 disas/libvixl/Makefile.objs|9 +-
 disas/libvixl/README   |3 +-
 disas/libvixl/a64/assembler-a64.h  | 2353 --
 disas/libvixl/a64/disasm-a64.cc| 1954 -
 disas/libvixl/a64/instructions-a64.cc  |  314 --
 disas/libvixl/a64/instructions-a64.h   |  384 --
 disas/libvixl/vixl/a64/assembler-a64.h | 4624 
 disas/libvixl/{ => vixl}/a64/constants-a64.h   |  967 +++-
 disas/libvixl/{ => vixl}/a64/cpu-a64.h |6 +-
 disas/libvixl/{ => vixl}/a64/decoder-a64.cc|  210 +-
 disas/libvixl/{ => vixl}/a64/decoder-a64.h |   58 +-
 disas/libvixl/vixl/a64/disasm-a64.cc   | 3487 +++
 disas/libvixl/{ => vixl}/a64/disasm-a64.h  |   17 +-
 disas/libvixl/vixl/a64/instructions-a64.cc |  622 +++
 disas/libvixl/vixl/a64/instructions-a64.h  |  757 
 disas/libvixl/{ => vixl}/code-buffer.h |2 +-
 .../{utils.cc => vixl/compiler-intrinsics.cc}  |  137 +-
 disas/libvixl/vixl/compiler-intrinsics.h   |  155 +
 disas/libvixl/{ => vixl}/globals.h |   82 +-
 disas/libvixl/vixl/invalset.h  |  775 
 disas/libvixl/{ => vixl}/platform.h|2 +-
 disas/libvixl/vixl/utils.cc|  142 +
 disas/libvixl/{ => vixl}/utils.h   |  115 +-
 hw/arm/virt.c  |   14 +
 hw/arm/xlnx-ep108.c|   35 +-
 hw/arm/xlnx-zynqmp.c   |   37 +
 hw/dma/xilinx_axidma.c |   10 -
 hw/misc/imx31_ccm.c|  188 +-
 include/hw/arm/xlnx-zynqmp.h   |   12 +
 include/hw/misc/imx31_ccm.h|   38 +-
 31 files changed, 12185 insertions(+), 5326 deletions(-)
 delete mode 100644 disas/libvixl/a64/assembler-a64.h
 delete mode 100644 disas/libvixl/a64/disasm-a64.cc
 delete mode 100644 disas/libvixl/a64/instructions-a64.cc
 delete mode 100644 disas/libvixl/a64/instructions-a64.h
 create mode 100644 disas/libvixl/vixl/a64/assembler-a64.h
 rename disas/libvixl/{ => vixl}/a64/constants-a64.h (51%)
 rename disas/libvixl/{ => vixl}/a64/cpu-a64.h (96%)
 rename disas/libvixl/{ => vixl}/a64/decoder-a64.cc (81%)
 rename disas/libvixl/{ => vixl}/a64/decoder-a64.h (82%)
 create mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc
 rename disas/libvixl/{ => vixl}/a64/disasm-a64.h (94%)
 create mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc
 create mode 100644 disas/libvixl/vixl/a64/instructions-a64.h
 rename disas/libvixl/{ => vixl}/code-buffer.h (99%)
 rename disas/libvixl/{utils.cc => vixl/compiler-intrinsics.cc} (60%)
 create mode 100644 disas/libvixl/vixl/compiler-intrinsics.h
 rename disas/libvixl/{ => vixl}/globals.h (52%)
 create mode 100644 disas/libvixl/vixl/invalset.h
 rename disas/libvixl/{ => vixl}/platform.h (98%)
 create mode 100644 disas/libvixl/vixl/utils.cc
 rename disas/libvixl/{ => vixl}/utils.h (68%)

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2016-01-11 Thread Peter Maydell 
On 11 January 2016 at 14:34, Peter Maydell  wrote:
> Not very many patches here, but no point holding on to them.
> I'm not going to email out the libvixl upgrade patch because
> it's so big it'd get blocked by the list server anyway.
>
> thanks
> -- PMM
>
>
> The following changes since commit 692a5519ab1510ff48bdde9701017b9425643058:
>
>   Merge remote-tracking branch 
> 'remotes/mjt/tags/pull-trivial-patches-2016-01-11' into staging (2016-01-11 
> 12:56:58 +)
>
> are available in the git repository at:
>
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20160111
>
> for you to fetch changes up to fe84fe5e2a59d5e83f043226114153bd3ccb1c51:
>
>   hw/arm/virt: Support legacy -nic command line syntax (2016-01-11 14:23:03 
> +)
>
> 
> target-arm queue:
>  * i.MX: move i.MX31 CCM object to register array
>  * xilinx_axidma: remove dead code
>  * xlnx-zynqmp: Add support for high DDR memory regions
>  * disas/libvixl: Update to upstream VIXL 1.12
>  * virt: Support legacy -nic command line syntax
>

There was a compile issue with the "xlnx-zynqmp: Add support for high DDR
memory regions" patch; I have dropped it and will redo the pull.

thanks
-- PMM

Re: [Qemu-devel] [PULL 0/5] target-arm queue

2012-01-28 Thread Blue Swirl 
On Wed, Jan 25, 2012 at 15:27, Peter Maydell peter.mayd...@linaro.org wrote:
 Here's the latest target-arm pullreq. It includes Mark's fix for
 config_base_register, which is in turn a dependency of the arm-devs
 pullreq I'm about to send out, and which I'd like to get in before
 Anthony's QOM patchset lands and invalidates it :-)

 Please pull.

Thanks, pulled.

 -- PMM


 The following changes since commit 5b4448d27d7c6ff6e18a1edc8245cb1db783e37c:

  Merge remote-tracking branch 'qemu-kvm/uq/master' into staging (2012-01-23 
 11:00:26 -0600)

 are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream

 Mark Langsdorf (1):
      arm: store the config_base_register during cpu_reset

 Peter Maydell (4):
      target-arm: Fix implementation of TLB invalidate operations
      target-arm/helper.c: Don't assume softfloat int32 is 32 bits only
      Add dummy implementation of generic timer cp15 registers
      Add Cortex-A15 CPU definition

  target-arm/cpu.h    |    2 +
  target-arm/helper.c |   86 
 ++-
  2 files changed, 73 insertions(+), 15 deletions(-)

[Qemu-devel] [PULL 0/5] target-arm queue

2012-01-25 Thread Peter Maydell 
Here's the latest target-arm pullreq. It includes Mark's fix for
config_base_register, which is in turn a dependency of the arm-devs
pullreq I'm about to send out, and which I'd like to get in before
Anthony's QOM patchset lands and invalidates it :-)

Please pull.

-- PMM


The following changes since commit 5b4448d27d7c6ff6e18a1edc8245cb1db783e37c:

  Merge remote-tracking branch 'qemu-kvm/uq/master' into staging (2012-01-23 
11:00:26 -0600)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream

Mark Langsdorf (1):
  arm: store the config_base_register during cpu_reset

Peter Maydell (4):
  target-arm: Fix implementation of TLB invalidate operations
  target-arm/helper.c: Don't assume softfloat int32 is 32 bits only
  Add dummy implementation of generic timer cp15 registers
  Add Cortex-A15 CPU definition

 target-arm/cpu.h|2 +
 target-arm/helper.c |   86 ++-
 2 files changed, 73 insertions(+), 15 deletions(-)