[Qemu-devel] [RFC for-4.1 04/25] target/ppc: Style fixes for cpu.[ch]
Signed-off-by: David Gibson
---
target/ppc/cpu.h | 239 ++-
1 file changed, 130 insertions(+), 109 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index fc12b4688e..5d25b17539 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -23,23 +23,28 @@
#include "qemu-common.h"
#include "qemu/int128.h"
-//#define PPC_EMULATE_32BITS_HYPV
+/* #define PPC_EMULATE_32BITS_HYPV */
-#if defined (TARGET_PPC64)
+#if defined(TARGET_PPC64)
/* PowerPC 64 definitions */
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12
#define TCG_GUEST_DEFAULT_MO 0
-/* Note that the official physical address space bits is 62-M where M
- is implementation dependent. I've not looked up M for the set of
- cpus we emulate at the system level. */
+/*
+ * Note that the official physical address space bits is 62-M where M
+ * is implementation dependent. I've not looked up M for the set of
+ * cpus we emulate at the system level.
+ */
#define TARGET_PHYS_ADDR_SPACE_BITS 62
-/* Note that the PPC environment architecture talks about 80 bit virtual
- addresses, with segmentation. Obviously that's not all visible to a
- single process, which is all we're concerned with here. */
+/*
+ * Note that the PPC environment architecture talks about 80 bit
+ * virtual addresses, with segmentation. Obviously that's not all
+ * visible to a single process, which is all we're concerned with
+ * here.
+ */
#ifdef TARGET_ABI32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
@@ -49,7 +54,7 @@
#define TARGET_PAGE_BITS_64K 16
#define TARGET_PAGE_BITS_16M 24
-#else /* defined (TARGET_PPC64) */
+#else /* defined(TARGET_PPC64) */
/* PowerPC 32 definitions */
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12
@@ -57,14 +62,14 @@
#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#endif /* defined (TARGET_PPC64) */
+#endif /* defined(TARGET_PPC64) */
#define CPUArchState struct CPUPPCState
#include "exec/cpu-defs.h"
#include "cpu-qom.h"
-#if defined (TARGET_PPC64)
+#if defined(TARGET_PPC64)
#define PPC_ELF_MACHINE EM_PPC64
#else
#define PPC_ELF_MACHINE EM_PPC
@@ -237,9 +242,11 @@ struct ppc_spr_t {
const char *name;
target_ulong default_value;
#ifdef CONFIG_KVM
-/* We (ab)use the fact that all the SPRs will have ids for the
+/*
+ * We (ab)use the fact that all the SPRs will have ids for the
* ONE_REG interface will have KVM_REG_PPC to use 0 as meaning,
- * don't sync this */
+ * don't sync this
+ */
uint64_t one_reg_id;
#endif
};
@@ -656,39 +663,39 @@ enum {
#define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE) & \
0x1F)
-#define FP_FX (1ull << FPSCR_FX)
-#define FP_FEX (1ull << FPSCR_FEX)
-#define FP_VX (1ull << FPSCR_VX)
-#define FP_OX (1ull << FPSCR_OX)
-#define FP_UX (1ull << FPSCR_UX)
-#define FP_ZX (1ull << FPSCR_ZX)
-#define FP_XX (1ull << FPSCR_XX)
-#define FP_VXSNAN (1ull << FPSCR_VXSNAN)
-#define FP_VXISI (1ull << FPSCR_VXISI)
-#define FP_VXIDI (1ull << FPSCR_VXIDI)
-#define FP_VXZDZ (1ull << FPSCR_VXZDZ)
-#define FP_VXIMZ (1ull << FPSCR_VXIMZ)
-#define FP_VXVC(1ull << FPSCR_VXVC)
-#define FP_FR (1ull << FSPCR_FR)
-#define FP_FI (1ull << FPSCR_FI)
-#define FP_C (1ull << FPSCR_C)
-#define FP_FL (1ull << FPSCR_FL)
-#define FP_FG (1ull << FPSCR_FG)
-#define FP_FE (1ull << FPSCR_FE)
-#define FP_FU (1ull << FPSCR_FU)
-#define FP_FPCC(FP_FL | FP_FG | FP_FE | FP_FU)
-#define FP_FPRF(FP_C | FP_FL | FP_FG | FP_FE | FP_FU)
-#define FP_VXSOFT (1ull << FPSCR_VXSOFT)
-#define FP_VXSQRT (1ull << FPSCR_VXSQRT)
-#define FP_VXCVI (1ull << FPSCR_VXCVI)
-#define FP_VE (1ull << FPSCR_VE)
-#define FP_OE (1ull << FPSCR_OE)
-#define FP_UE (1ull << FPSCR_UE)
-#define FP_ZE (1ull << FPSCR_ZE)
-#define FP_XE (1ull << FPSCR_XE)
-#define FP_NI (1ull << FPSCR_NI)
-#define FP_RN1 (1ull << FPSCR_RN1)
-#define FP_RN (1ull << FPSCR_RN)
+#define FP_FX (1ull << FPSCR_FX)
+#define FP_FEX (1ull << FPSCR_FEX)
+#define FP_VX (1ull << FPSCR_VX)
+#define FP_OX (1ull << FPSCR_OX)
+#define FP_UX (1ull << FPSCR_UX)
+#define FP_ZX (1ull << FPSCR_ZX)
+#define FP_XX (1ull << FPSCR_XX)
+#define FP_VXSNAN (1ull << FPSCR_VXSNAN)
+#define FP_VXISI(1ull << FPSCR_VXISI)
+#define FP_VXIDI(1ull << FPSCR_VXIDI)
+#define FP_VXZDZ(1ull << FPSCR_VXZDZ)
+#define FP_VXIMZ(1ull << FPSCR_VXIMZ)
+#define FP_VXVC (1ull << FPSCR_VXVC)
+#define FP_FR (1ull << FSPCR_FR)
+#define FP_FI (1ull << FPSCR_FI)
+#define FP_C(1ull << FPSCR_C)
+#define FP_FL
Re: [Qemu-devel] [RFC for-4.1 04/25] target/ppc: Style fixes for cpu.[ch]
On 3/22/19 1:15 AM, David Gibson wrote:
> Signed-off-by: David Gibson
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> target/ppc/cpu.h | 239 ++-
> 1 file changed, 130 insertions(+), 109 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index fc12b4688e..5d25b17539 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -23,23 +23,28 @@
> #include "qemu-common.h"
> #include "qemu/int128.h"
>
> -//#define PPC_EMULATE_32BITS_HYPV
> +/* #define PPC_EMULATE_32BITS_HYPV */
>
> -#if defined (TARGET_PPC64)
> +#if defined(TARGET_PPC64)
> /* PowerPC 64 definitions */
> #define TARGET_LONG_BITS 64
> #define TARGET_PAGE_BITS 12
>
> #define TCG_GUEST_DEFAULT_MO 0
>
> -/* Note that the official physical address space bits is 62-M where M
> - is implementation dependent. I've not looked up M for the set of
> - cpus we emulate at the system level. */
> +/*
> + * Note that the official physical address space bits is 62-M where M
> + * is implementation dependent. I've not looked up M for the set of
> + * cpus we emulate at the system level.
> + */
> #define TARGET_PHYS_ADDR_SPACE_BITS 62
>
> -/* Note that the PPC environment architecture talks about 80 bit virtual
> - addresses, with segmentation. Obviously that's not all visible to a
> - single process, which is all we're concerned with here. */
> +/*
> + * Note that the PPC environment architecture talks about 80 bit
> + * virtual addresses, with segmentation. Obviously that's not all
> + * visible to a single process, which is all we're concerned with
> + * here.
> + */
> #ifdef TARGET_ABI32
> # define TARGET_VIRT_ADDR_SPACE_BITS 32
> #else
> @@ -49,7 +54,7 @@
> #define TARGET_PAGE_BITS_64K 16
> #define TARGET_PAGE_BITS_16M 24
>
> -#else /* defined (TARGET_PPC64) */
> +#else /* defined(TARGET_PPC64) */
> /* PowerPC 32 definitions */
> #define TARGET_LONG_BITS 32
> #define TARGET_PAGE_BITS 12
> @@ -57,14 +62,14 @@
> #define TARGET_PHYS_ADDR_SPACE_BITS 36
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> -#endif /* defined (TARGET_PPC64) */
> +#endif /* defined(TARGET_PPC64) */
>
> #define CPUArchState struct CPUPPCState
>
> #include "exec/cpu-defs.h"
> #include "cpu-qom.h"
>
> -#if defined (TARGET_PPC64)
> +#if defined(TARGET_PPC64)
> #define PPC_ELF_MACHINE EM_PPC64
> #else
> #define PPC_ELF_MACHINE EM_PPC
> @@ -237,9 +242,11 @@ struct ppc_spr_t {
> const char *name;
> target_ulong default_value;
> #ifdef CONFIG_KVM
> -/* We (ab)use the fact that all the SPRs will have ids for the
> +/*
> + * We (ab)use the fact that all the SPRs will have ids for the
> * ONE_REG interface will have KVM_REG_PPC to use 0 as meaning,
> - * don't sync this */
> + * don't sync this
> + */
> uint64_t one_reg_id;
> #endif
> };
> @@ -656,39 +663,39 @@ enum {
> #define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE) &
> \
> 0x1F)
>
> -#define FP_FX(1ull << FPSCR_FX)
> -#define FP_FEX (1ull << FPSCR_FEX)
> -#define FP_VX(1ull << FPSCR_VX)
> -#define FP_OX(1ull << FPSCR_OX)
> -#define FP_UX(1ull << FPSCR_UX)
> -#define FP_ZX(1ull << FPSCR_ZX)
> -#define FP_XX(1ull << FPSCR_XX)
> -#define FP_VXSNAN(1ull << FPSCR_VXSNAN)
> -#define FP_VXISI (1ull << FPSCR_VXISI)
> -#define FP_VXIDI (1ull << FPSCR_VXIDI)
> -#define FP_VXZDZ (1ull << FPSCR_VXZDZ)
> -#define FP_VXIMZ (1ull << FPSCR_VXIMZ)
> -#define FP_VXVC (1ull << FPSCR_VXVC)
> -#define FP_FR(1ull << FSPCR_FR)
> -#define FP_FI(1ull << FPSCR_FI)
> -#define FP_C (1ull << FPSCR_C)
> -#define FP_FL(1ull << FPSCR_FL)
> -#define FP_FG(1ull << FPSCR_FG)
> -#define FP_FE(1ull << FPSCR_FE)
> -#define FP_FU(1ull << FPSCR_FU)
> -#define FP_FPCC (FP_FL | FP_FG | FP_FE | FP_FU)
> -#define FP_FPRF (FP_C | FP_FL | FP_FG | FP_FE | FP_FU)
> -#define FP_VXSOFT(1ull << FPSCR_VXSOFT)
> -#define FP_VXSQRT(1ull << FPSCR_VXSQRT)
> -#define FP_VXCVI (1ull << FPSCR_VXCVI)
> -#define FP_VE(1ull << FPSCR_VE)
> -#define FP_OE(1ull << FPSCR_OE)
> -#define FP_UE(1ull << FPSCR_UE)
> -#define FP_ZE(1ull << FPSCR_ZE)
> -#define FP_XE(1ull << FPSCR_XE)
> -#define FP_NI(1ull << FPSCR_NI)
> -#define FP_RN1 (1ull << FPSCR_RN1)
> -#define FP_RN(1ull << FPSCR_RN)
> +#define FP_FX (1ull << FPSCR_FX)
> +#define FP_FEX (1ull << FPSCR_FEX)
> +#define FP_VX (1ull << FPSCR_VX)
> +#define FP_OX (1ull << FPSCR_OX)
> +#define FP_UX (1ull << FPSCR_UX)
> +#define FP_ZX (1ull << FPSCR_ZX)
> +#define FP_XX
