[Qemu-devel] Re: [PATCH, RFC, WIP] TCG for Qemu target Sparc32/64
Blue Swirl wrote: The attached patch enables most TCG ops for Qemu Sparc32/64 target. Sparc32 softmmu and linux-user are OK, but Sparc64 and Sparc32plus targets do not work. Comments? It would be nice to get rid of T2 usage in std (also stda and casa/casxa) but I don't know how to pass a 64-bit value from legacy op to TCG stores and loads on a 32-bit target and host. [...] Also don't forget that T2 is used in CPU restore state to handle delay slots. This part of the SPARC target is tricky and should be simplified. Another point is that you should define TCG globals for each SPARC GPR. It was not done for i386 because I feared performance regressions when accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have this issue. Regarding the generic xxx_tl defines, I did not move it into TCG because I wanted TCG to be target independent. Since it is no longer the case because of the target memory access instructions, I think it is a good idea now. But do not mix the target specific defines with target independent defines (in tcg-op.h there is a specific section for target specific defines). Regards, Fabrice.
[Qemu-devel] Re: [PATCH, RFC, WIP] TCG for Qemu target Sparc32/64
[...] Another point is that you should define TCG globals for each SPARC GPR. It was not done for i386 because I feared performance regressions when accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have this issue. Nice idea. Would this also work for windowed registers? Yes, provided you use a fixed register to store regwptr. Then you can define the windowed registers as globals using this register as base. The real problem is to save and restore this register in cpu_exec() and in all the places where the regwptr CPU state field is accessed directly. TCG will handle these problems generically soon, but before it does it you can implement it by hand. Regards, Fabrice.
Re: [Qemu-devel] Re: [PATCH, RFC, WIP] TCG for Qemu target Sparc32/64
Another point is that you should define TCG globals for each SPARC GPR. It was not done for i386 because I feared performance regressions when accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have this issue. How would these be kept consistent with CPUState? Paul
Re: [Qemu-devel] Re: [PATCH, RFC, WIP] TCG for Qemu target Sparc32/64
On Sat, Feb 23, 2008 at 07:23:49PM +0100, Fabrice Bellard wrote: But do not mix the target specific defines with target independent defines (in tcg-op.h there is a specific section for target specific defines). Might it be worth moving that section into a new file? -- Stuart Brady