Re: [Qemu-devel] arm, mips and mipsel broken
Aurelien Jarno schrieb: > Please note that at least qemu-system-arm, qemu-system-mips and > qemu-system-mipsel are broken by this commit: > > commit c169998802505c244b8bcad562633f29de7d74a4 > Author: Glauber Costa > Date: Thu Nov 5 16:05:15 2009 -0200 > > v3: don't call reset functions on cpu initialization > ... Hi, at least for MIPS Malta, cirrus vga is broken, too. I see unassigned memory writes in low memory when linux tries to blink the soft cursor, and there is no output on the vga display. The reset problem can be fixed partially with a simple code change: removing load_kernel() in function main_cpu_reset allows malta to boot again (only serial console, see above). Reboot from linux does not work. Regards, Stefan
Re: [Qemu-devel] arm, mips and mipsel broken
> > This is latent breakage introduced by 45a50b1. > > See commits 97fe84f5 (makes breakage obvious) and f2d7497 (fixed ARM). > > MIPS still needs fixing. > > I can't find 97fe84f5 or f2d7497, what commits are those? http://git.savannah.gnu.org/cgit/qemu.git/commit/?id=97fe84f5 http://git.savannah.gnu.org/cgit/qemu.git/commit/?id=f2d7497 Paul
Re: [Qemu-devel] arm, mips and mipsel broken
On Wed, Nov 11, 2009 at 8:28 PM, Paul Brook wrote: > On Tuesday 10 November 2009, Aurelien Jarno wrote: >> On Tue, Nov 10, 2009 at 11:19:40PM +0200, Blue Swirl wrote: >> > On Tue, Nov 10, 2009 at 10:50 PM, Aurelien Jarno > wrote: >> > > Please note that at least qemu-system-arm, qemu-system-mips and >> > > qemu-system-mipsel are broken by this commit: >> > >> > Given that none of the devices touched by the commit should be used by >> > these targets, the breakage comes from just the single new call to >> > qemu_system_reset in vl.c. This means that the reset functions for >> > those boards and devices must be awfully buggy. >> >> I'll try to have a closer look at the problem tomorrow, if I can't find >> the problem, it's what I'll commit. > > This is latent breakage introduced by 45a50b1. > See commits 97fe84f5 (makes breakage obvious) and f2d7497 (fixed ARM). > MIPS still needs fixing. I can't find 97fe84f5 or f2d7497, what commits are those?
Re: [Qemu-devel] arm, mips and mipsel broken
On Wed, Nov 11, 2009 at 8:57 PM, Glauber Costa wrote: > On Tue, Nov 10, 2009 at 11:19:40PM +0200, Blue Swirl wrote: >> On Tue, Nov 10, 2009 at 10:50 PM, Aurelien Jarno >> wrote: >> > Please note that at least qemu-system-arm, qemu-system-mips and >> > qemu-system-mipsel are broken by this commit: >> >> Given that none of the devices touched by the commit should be used by >> these targets, the breakage comes from just the single new call to >> qemu_system_reset in vl.c. This means that the reset functions for >> those boards and devices must be awfully buggy. >> >> I think the easiest solution is to surround the call by >> #if defined(TARGET_I386) || defined(TARGET_PPC) || defined(TARGET_SPARC) >> #endif >> until the devices have been fixed. > > if we don't call that, how can we be sure that the devices are in fact reset? > > We need a call to qemu_system_reset somewhere before we can start the machine Strange, reverting the commits make PPC crash on boot, but system_reset starts the system: qemu: warning: could not load VGA bios 'video.x' invalid/unsupported opcode: 00 - 00 - 00 () 0 invalid/unsupported opcode: 00 - 00 - 00 () 0700 0 QEMU 0.11.50 monitor - type 'help' for more information (qemu) system_reset (qemu) >> = >> OpenBIOS 1.0 [Oct 18 2009 12:04] >> Configuration device id QEMU version 1 machine id 2 >> CPUs: 1 >> Memory: 128M >> UUID: ---- >> CPU type PowerPC,750 Welcome to OpenBIOS v1.0 built on Oct 18 2009 12:04 I'm not sure how to fix this.
Re: [Qemu-devel] arm, mips and mipsel broken
On Tue, Nov 10, 2009 at 11:19:40PM +0200, Blue Swirl wrote: > On Tue, Nov 10, 2009 at 10:50 PM, Aurelien Jarno wrote: > > Please note that at least qemu-system-arm, qemu-system-mips and > > qemu-system-mipsel are broken by this commit: > > Given that none of the devices touched by the commit should be used by > these targets, the breakage comes from just the single new call to > qemu_system_reset in vl.c. This means that the reset functions for > those boards and devices must be awfully buggy. > > I think the easiest solution is to surround the call by > #if defined(TARGET_I386) || defined(TARGET_PPC) || defined(TARGET_SPARC) > #endif > until the devices have been fixed. if we don't call that, how can we be sure that the devices are in fact reset? We need a call to qemu_system_reset somewhere before we can start the machine > >
Re: [Qemu-devel] arm, mips and mipsel broken
On Tuesday 10 November 2009, Aurelien Jarno wrote: > On Tue, Nov 10, 2009 at 11:19:40PM +0200, Blue Swirl wrote: > > On Tue, Nov 10, 2009 at 10:50 PM, Aurelien Jarno wrote: > > > Please note that at least qemu-system-arm, qemu-system-mips and > > > qemu-system-mipsel are broken by this commit: > > > > Given that none of the devices touched by the commit should be used by > > these targets, the breakage comes from just the single new call to > > qemu_system_reset in vl.c. This means that the reset functions for > > those boards and devices must be awfully buggy. > > I'll try to have a closer look at the problem tomorrow, if I can't find > the problem, it's what I'll commit. This is latent breakage introduced by 45a50b1. See commits 97fe84f5 (makes breakage obvious) and f2d7497 (fixed ARM). MIPS still needs fixing. Paul
Re: [Qemu-devel] arm, mips and mipsel broken
On Tue, Nov 10, 2009 at 11:19:40PM +0200, Blue Swirl wrote: > On Tue, Nov 10, 2009 at 10:50 PM, Aurelien Jarno wrote: > > Please note that at least qemu-system-arm, qemu-system-mips and > > qemu-system-mipsel are broken by this commit: > > Given that none of the devices touched by the commit should be used by > these targets, the breakage comes from just the single new call to > qemu_system_reset in vl.c. This means that the reset functions for > those boards and devices must be awfully buggy. > > I think the easiest solution is to surround the call by > #if defined(TARGET_I386) || defined(TARGET_PPC) || defined(TARGET_SPARC) > #endif > until the devices have been fixed. > I'll try to have a closer look at the problem tomorrow, if I can't find the problem, it's what I'll commit. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net
Re: [Qemu-devel] arm, mips and mipsel broken
On Tue, Nov 10, 2009 at 10:50 PM, Aurelien Jarno wrote: > Please note that at least qemu-system-arm, qemu-system-mips and > qemu-system-mipsel are broken by this commit: Given that none of the devices touched by the commit should be used by these targets, the breakage comes from just the single new call to qemu_system_reset in vl.c. This means that the reset functions for those boards and devices must be awfully buggy. I think the easiest solution is to surround the call by #if defined(TARGET_I386) || defined(TARGET_PPC) || defined(TARGET_SPARC) #endif until the devices have been fixed.
[Qemu-devel] arm, mips and mipsel broken
Please note that at least qemu-system-arm, qemu-system-mips and qemu-system-mipsel are broken by this commit: commit c169998802505c244b8bcad562633f29de7d74a4 Author: Glauber Costa Date: Thu Nov 5 16:05:15 2009 -0200 v3: don't call reset functions on cpu initialization There is absolutely no need to call reset functions when initializing devices. Since we are already registering them, calling qemu_system_reset() should suffice. Actually, it is what happens when we reboot the machine, and using the same process instead of a special case semantics will even allow us to find bugs easier. Furthermore, the fact that we initialize things like the cpu quite early, leads to the need to introduce synchronization stuff like qemu_system_cond. This patch removes it entirely. All we need to do is call qemu_system_reset() only when we're already sure the system is up and running I tested it with qemu (with and without io-thread) and qemu-kvm, and it seems to be doing okay - although qemu-kvm uses a slightly different patch. [ v2: user mode still needs cpu_reset, so put it in ifdef. ] [ v3: leave qemu_system_cond for now. ] Signed-off-by: Glauber Costa Signed-off-by: Blue Swirl -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net
