[Qemu-devel] qemu/target-ppc cpu.h helper.c translate_init.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/11/19 11:41:10 Modified files: target-ppc : cpu.h helper.c translate_init.c Log message: PowerPC 620 MMU do not have the same exact behavior as standard 64 bits PowerPC ones. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.102&r2=1.103 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.94&r2=1.95 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.67&r2=1.68
[Qemu-devel] qemu/target-ppc cpu.h helper.c translate_init.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/11/17 22:42:36 Modified files: target-ppc : cpu.h helper.c translate_init.c Log message: Define Freescale cores specific MMU model, exceptions and input bus. (but do not provide any actual implementation). CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.98&r2=1.99 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.93&r2=1.94 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.63&r2=1.64
[Qemu-devel] qemu/target-ppc cpu.h helper.c helper_regs.h op...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/11/17 21:14:09 Modified files: target-ppc : cpu.h helper.c helper_regs.h op_helper.c Log message: PowerPC hypervisor mode is not fundamentally available only for PowerPC 64. Remove TARGET_PPC64 dependency and add code provision to be able to define a fake 32 bits CPU with hypervisor feature support. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.97&r2=1.98 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.92&r2=1.93 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper_regs.h?cvsroot=qemu&r1=1.4&r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.69&r2=1.70
[Qemu-devel] qemu/target-ppc cpu.h helper.c helper_regs.h op...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/11/04 02:55:34 Modified files: target-ppc : cpu.h helper.c helper_regs.h op.c op_helper.c op_helper.h translate.c translate_init.c Log message: PowerPC 601 need specific callbacks for its BATs setup. Implement PowerPC 601 HID0 register, needed for little-endian mode support. As a consequence, we need to merge hflags coming from MSR with other ones. Use little-endian mode from hflags instead of MSR during code translation. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.87&r2=1.88 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.87&r2=1.88 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper_regs.h?cvsroot=qemu&r1=1.2&r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.61&r2=1.62 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.62&r2=1.63 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.25&r2=1.26 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.101&r2=1.102 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.55&r2=1.56
[Qemu-devel] qemu/target-ppc cpu.h helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/10/14 10:21:20 Modified files: target-ppc : cpu.h helper.c Log message: Properly implement non-execute bit on PowerPC segments and PTEs. Fix page protection bits for PowerPC 64 MMU. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.82&r2=1.83 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.79&r2=1.80
[Qemu-devel] qemu/target-ppc cpu.h helper.c translate_init.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/10/14 09:14:09 Modified files: target-ppc : cpu.h helper.c translate_init.c Log message: There is no need of a specific MMU model for PowerPC 601. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.80&r2=1.81 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.78&r2=1.79 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.50&r2=1.51
[Qemu-devel] qemu/target-ppc cpu.h helper.c translate_init.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/10/08 02:58:07 Modified files: target-ppc : cpu.h helper.c translate_init.c Log message: Remove synonymous in PowerPC MSR bits definitions. Fix MSR EP bit buggy definition. Remove unuseful MSR flags. Fix MSR bits and flags definitions for most supported PowerPC implementations. Add MSR definitions/flags constistency checks and optional dump. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.77&r2=1.78 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.74&r2=1.75 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.49&r2=1.50
[Qemu-devel] qemu/target-ppc cpu.h helper.c translate.c tran...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/10/07 14:41:00 Modified files: target-ppc : cpu.h helper.c translate.c translate_init.c Log message: Add MSR bits signification per PowerPC implementation flags (to be continued). As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.73&r2=1.74 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.69&r2=1.70 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.86&r2=1.87 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.43&r2=1.44
[Qemu-devel] qemu/target-ppc cpu.h helper.c op.c translate.c...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/10/05 22:06:02 Modified files: target-ppc : cpu.h helper.c op.c translate.c translate_init.c Log message: Full implementation of PowerPC 64 MMU, just missing support for 1 TB memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.72&r2=1.73 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.68&r2=1.69 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.53&r2=1.54 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.85&r2=1.86 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.42&r2=1.43
[Qemu-devel] qemu/target-ppc cpu.h helper.c op.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/10/01 21:49:57 Modified files: target-ppc : cpu.h helper.c op.c Log message: Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.c CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.68&r2=1.69 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.63&r2=1.64 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.51&r2=1.52
[Qemu-devel] qemu/target-ppc cpu.h helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/09/30 00:50:23 Modified files: target-ppc : cpu.h helper.c Log message: XER is to be treated as a 64 bits register on 64 bits implementations, according to the PowerPC 2.04 specification. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.64&r2=1.65 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.59&r2=1.60
[Qemu-devel] qemu/target-ppc cpu.h helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/09/21 05:23:26 Modified files: target-ppc : cpu.h helper.c Log message: Make CPU hflags be a masked version of the PowerPC MSR. As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.55&r2=1.56 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.54&r2=1.55
[Qemu-devel] qemu/target-ppc cpu.h helper.c op.c op_helper.c...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/04/24 06:44:14 Modified files: target-ppc : cpu.h helper.c op.c op_helper.c translate_init.c Log message: Improve PowerPC 405 MMU model / share more code for other embedded targets support. Fix PowerPC 405 MSR mask. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.44&r2=1.45 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.47&r2=1.48 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.34&r2=1.35 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.29&r2=1.30 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.17&r2=1.18
[Qemu-devel] qemu/target-ppc cpu.h helper.c op_helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/04/16 09:21:46 Modified files: target-ppc : cpu.h helper.c op_helper.c Log message: PowerPC 4xx software driven TLB fixes + debug traces. Add code provision for more MMU models support. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.42&r2=1.43 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.45&r2=1.46 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.28&r2=1.29
[Qemu-devel] qemu/target-ppc cpu.h helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/03/31 11:10:49 Modified files: target-ppc : cpu.h helper.c Log message: As embedded PowerPC TLB model is very different from PowerPC 6xx ones, define ppc_tlb_t as an union of the two. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.34&r2=1.35 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.36&r2=1.37
[Qemu-devel] qemu/target-ppc cpu.h helper.c op.c op_helper.c...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/03/23 09:45:27 Modified files: target-ppc : cpu.h helper.c op.c op_helper.c op_helper.h op_mem.h translate.c translate_init.c Log message: Add missing PowerPC 64 instructions PowerPC 64 fixes. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.30&r2=1.31 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.34&r2=1.35 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.29&r2=1.30 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.22&r2=1.23 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.6&r2=1.7 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_mem.h?cvsroot=qemu&r1=1.11&r2=1.12 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.51&r2=1.52 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.6&r2=1.7 ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/target-ppc cpu.h helper.c translate.c tran...
CVSROOT:/sources/qemu Module name:qemu Changes by: Jocelyn Mayer 07/03/23 09:40:22 Modified files: target-ppc : cpu.h helper.c translate.c translate_init.c Log message: Fix debug printf: we need different macros for target_ulong prints and GPR ones, as the lengths can be different. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.29&r2=1.30 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.33&r2=1.34 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.50&r2=1.51 http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.5&r2=1.6 ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
