Re: [RFC PATCH v3 cxl-2.0-doe 0/2] Version 3 patch series for PCIe DOE for PCIe and CXL 2.0
On Tue, 9 Mar 2021 15:33:49 -0500 Chris Browy wrote: > Version 3 patch series for PCIe DOE for PCIe and CXL 2.0 implements > all planned functionality. > > Based on QEMU version: > https://gitlab.com/bwidawsk/qemu/-/tree/cxl-2.0v4 > > Summary: > 1: PCIe DOE support for Discovery >- Support multiple DOE instances for each own protocol set >- MSI-X and polling supported >- Update error and interrupt status in DOE Status register >- Use static array to register callback function for DOE protocols >- Deprecate DOE_SUCCESS and DOE_DISCARD >- Add license headers > 2: CXL DOE for CDAT and Compliance Mode. >- Device supports pre-defined CDAT or user-provided CDAT. >- Support on reading the iASL aml file via specifying > "cdat=" property to -device cxl-type3 >skips over the ACPI header and writes only CDAT table entries >- Clean up CXL compliance structures >- DOE CDAT response returns one CDAT Structure instance based on > request EntryHandle value. > > Example cdat.dat file: (compile with iasl -G cdat.dat) > CDAT file may contain any mix and number of supported CDAT Structure types > -- > /* Header */ > Signature : "CDAT" > Table Length : > Revision : 01 > Checksum : 00 > Oem ID : AVERY > Oem Table ID : 0 > Oem Revision : 1 > Asl Compiler ID : "INTL" > Asl Compiler Revision : 20160527 I think this is a non starter because it's not an ACPI table and the header of CDAT just doesn't look like this. We 'might' be able to add some special handling to iASL as a convenient tool for generating cdat, or we might just write something CDAT specific (it's pretty simple after all!) Normally iASL will convert a static table into it's raw binary representation anyway, so we want to do something like that but end up with a valid CDAT table. Jonathan > > /* CDAT structures */ > Label : DSMAS // FieldByte Length > UINT8 : 0 // Type 1 > UINT8 : 00 // Reserved 1 > UINT16 : 0018 // Length 2 > UINT8 : 00 // DSMADHandle 1 > UINT8 : 00 // Flags1 > UINT16 : // Reserved 2 > UINT64 : // DPA Base 8 > UINT64 : // DPA Length 8 > > Label : DSLBIS // Field Byte Length > UINT8 : 01 // Type 1 > UINT8 : 00 // Reserved 1 > UINT16 : 0018 // Length 2 > UINT8 : 00 // Handle 1 > UINT8 : 00 // Flags1 > UINT8 : 00 // Data Type1 > UINT8 : 00 // Reserved 1 > UINT64 : // Entry Base Unit 8 > UINT16 : // Entry[0] 2 > UINT16 : // Entry[1] 2 > UINT16 : // Entry[2] 2 > UINT16 : // Reserved 2 > > Label: DSMSCIS // FieldByte Length > UINT8 : 02 // Type 1 > UINT8 : 00 // Reserved 1 > UINT16 : 0014 // Length 2 > UINT8 : 00 // DSMASHandle 1 > UINT24 : 00 // Reserved 3 > UINT64 : // Memory Side Cache Size8 > UINT32 : // Cache Attributes 4 > > Label : DSIS// FieldByte Length > UINT8 : 03 // Type 1 > UINT8 : 00 // Reserved 1 > UINT16 : 0008 // Length 2 > UINT8 : 00 // Flags1 > UINT8 : 00 // Handle 1 > UINT16 : // Reserved 2 > > Label : DSEMTS // FieldByte Length > UINT8 : 04 // Type 1 > UINT8 : 00 // Reserved 1 > UINT16 : 0018 // Length 2 > UINT8 : 00 // DSMAS Handle 1 > UINT8 : 00 // EFI Memory Type and Attribute1 > UINT16 : // Reserved 2 > UINT64 : // DPA Offset 8 > UINT64 : // DPA Length 8 > > Label : SSLBIS // FieldByte Length > UINT8 : 05 // Type 1 > UINT8 : 00 // Reserved 1 > UINT16 : 0020 // Length 2 > UINT8 : 00 // Data Type1 > UINT24 : 00 // Reserved 3 > UINT64 : // Entry Base Unit 8 > Label : SSLBE // SSLBE[0] > UINT16 : // Port X ID2 > UINT16 : // Port Y ID2 > UINT16 : // Latency or Bandwidth2 > UINT16 : // Reserved 2 > Label : SSLBE
[RFC PATCH v3 cxl-2.0-doe 0/2] Version 3 patch series for PCIe DOE for PCIe and CXL 2.0
Version 3 patch series for PCIe DOE for PCIe and CXL 2.0 implements all planned functionality. Based on QEMU version: https://gitlab.com/bwidawsk/qemu/-/tree/cxl-2.0v4 Summary: 1: PCIe DOE support for Discovery - Support multiple DOE instances for each own protocol set - MSI-X and polling supported - Update error and interrupt status in DOE Status register - Use static array to register callback function for DOE protocols - Deprecate DOE_SUCCESS and DOE_DISCARD - Add license headers 2: CXL DOE for CDAT and Compliance Mode. - Device supports pre-defined CDAT or user-provided CDAT. - Support on reading the iASL aml file via specifying "cdat=" property to -device cxl-type3 skips over the ACPI header and writes only CDAT table entries - Clean up CXL compliance structures - DOE CDAT response returns one CDAT Structure instance based on request EntryHandle value. Example cdat.dat file: (compile with iasl -G cdat.dat) CDAT file may contain any mix and number of supported CDAT Structure types -- /* Header */ Signature : "CDAT" Table Length : Revision : 01 Checksum : 00 Oem ID : AVERY Oem Table ID : 0 Oem Revision : 1 Asl Compiler ID : "INTL" Asl Compiler Revision : 20160527 /* CDAT structures */ Label : DSMAS // FieldByte Length UINT8 : 0 // Type 1 UINT8 : 00 // Reserved 1 UINT16 : 0018 // Length 2 UINT8 : 00 // DSMADHandle 1 UINT8 : 00 // Flags1 UINT16 : // Reserved 2 UINT64 : // DPA Base 8 UINT64 : // DPA Length 8 Label : DSLBIS // Field Byte Length UINT8 : 01 // Type 1 UINT8 : 00 // Reserved 1 UINT16 : 0018 // Length 2 UINT8 : 00 // Handle 1 UINT8 : 00 // Flags1 UINT8 : 00 // Data Type1 UINT8 : 00 // Reserved 1 UINT64 : // Entry Base Unit 8 UINT16 : // Entry[0] 2 UINT16 : // Entry[1] 2 UINT16 : // Entry[2] 2 UINT16 : // Reserved 2 Label: DSMSCIS // FieldByte Length UINT8 : 02 // Type 1 UINT8 : 00 // Reserved 1 UINT16 : 0014 // Length 2 UINT8 : 00 // DSMASHandle 1 UINT24 : 00 // Reserved 3 UINT64 : // Memory Side Cache Size8 UINT32 : // Cache Attributes 4 Label : DSIS// FieldByte Length UINT8 : 03 // Type 1 UINT8 : 00 // Reserved 1 UINT16 : 0008 // Length 2 UINT8 : 00 // Flags1 UINT8 : 00 // Handle 1 UINT16 : // Reserved 2 Label : DSEMTS // FieldByte Length UINT8 : 04 // Type 1 UINT8 : 00 // Reserved 1 UINT16 : 0018 // Length 2 UINT8 : 00 // DSMAS Handle 1 UINT8 : 00 // EFI Memory Type and Attribute1 UINT16 : // Reserved 2 UINT64 : // DPA Offset 8 UINT64 : // DPA Length 8 Label : SSLBIS // FieldByte Length UINT8 : 05 // Type 1 UINT8 : 00 // Reserved 1 UINT16 : 0020 // Length 2 UINT8 : 00 // Data Type1 UINT24 : 00 // Reserved 3 UINT64 : // Entry Base Unit 8 Label : SSLBE // SSLBE[0] UINT16 : // Port X ID2 UINT16 : // Port Y ID2 UINT16 : // Latency or Bandwidth2 UINT16 : // Reserved 2 Label : SSLBE // SSLBE[1] UINT16 : // Port X ID2 UINT16 : // Port Y ID2 UINT16 : // Latency or Bandwidth2 UINT16 : BBBC // Reserved 2 References: 1. CXL 2.0 specification https://www.computeexpresslink.org/download-the-specification 2. PCI-SIG ECN: Data Object Exchange (DOE) http://www.pcisig.com 3. Coherent Device Attribute Table CDAT 1.02 https://uefi.org/sites/default/files/resources/Coherent%20Device%20Attribute%20Table_1.02.pdf --- Chris Browy (2): Basic PCIe DOE support CXL DOE support for CDAT and Compliance Mode MAINTAINERS | 49 +--
